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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338A-B05808-GMR

Name: SI5338A-B05808-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338A-B05808-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338A-B05808-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338A-B05808-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338A-B05808-GMR from Skyworks Solutions is an I²C-programmable quad clock generator IC with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338A-B05808-GMR datasheet, SI5338A-B05808-GMR pinout, SI5338A-B05808-GMR application, or SI5338A-B05808-GMR equivalent, key selection criteria include PCIe jitter compliance, independent output voltage per driver (1.5/1.8/2.5/3.3 V), MultiSynth™ fractional synthesis resolution (1 ppb), spread-spectrum control (0.5–5.0% down-spread), and I²C/SMBus programmability with ClockBuilder Pro support.

Technical Context

The SI5338A-B05808-GMR implements a two-stage PLL architecture: a high-stability reference PLL (Stage 1) locks to one of six input sources (crystal, CMOS, SSTL/HSTL, or differential), followed by four independent MultiSynth™ fractional-N synthesizers (Stage 2) generating outputs from 0.16 MHz to 710 MHz. Each output stage supports format selection (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL) and independent VDDO supply (1.5–3.3 V).

It features real-time frequency and phase adjustment via dedicated pins (FINC/FDEC, PINC/PDEC) with 1 ppm step size and <20 ps phase step accuracy, plus loss-of-lock and loss-of-signal alarms. External feedback mode enables zero-delay operation, and spread spectrum is configurable per output (33–63 kHz modulation rate, 0.5–5.0% spread).

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3 SRNS and Gen 4 common clock specs
Output Frequency Range	0.16–710 MHz per channel; supports up to two >350 MHz outputs simultaneously (Fvco/4 & Fvco/6)
Synthesis Resolution	1 ppb; enables true zero-ppm frequency accuracy on all four outputs
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Supply Voltages	Core: 1.8/2.5/3.3 V ±10%; Output buffers: independently configurable 1.5/1.8/2.5/3.3 V
Operating Temperature	–40 to +85 °C; qualified for industrial and telecom line card environments
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch; RoHS-compliant, GMR suffix denotes green/reduced-halogen

Pinout & Package

SI5338A-B05808-GMR is housed in a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are validated per Skyworks Rev. 1.6 datasheet (pages 33–37).

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2	Differential input pair 1	Accepts 5–710 MHz AC-coupled differential clock; internal 100 Ω termination enabled
IN3, IN4	Single-ended input pair	Supports 5–200 MHz CMOS; VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A, CLK0B – CLK3A, CLK3B	Differential output pairs	Four independent LVPECL/LVDS/HCSL/CML outputs; each with dedicated VDDOx supply
VDDO0–VDDO3	Output buffer supplies	Independent 1.5/1.8/2.5/3.3 V per output bank; enables mixed-voltage system interfacing
SCL, SDA	I²C/SMBus interface	Standard 100/400 kHz operation; supports ClockBuilder Pro configuration and runtime reprogramming
INTR	Interrupt output	Open-drain status flag for loss-of-lock or loss-of-signal events
RSVD_GND	Reserved ground	Internal test pin; must be connected to GND per layout guidelines

Key Features

Feature	Design Value
MultiSynth™ synthesis	Four independent fractional-N synthesizers enable any-frequency generation (0.16–710 MHz) with 1 ppb resolution and 0 ppm error
PCIe Gen 1–4 compliance	Validated for Common Clock (Gen 1/2/3/4) and Gen 3 SRNS modes; meets Intel jitter requirements at 100 MHz HCSL
Glitchless frequency tuning	Pin-controlled FINC/FDEC inputs adjust output frequency in 1 ppm steps without cycle slips or phase discontinuity
Per-output voltage control	Each of four output banks has dedicated VDDO supply (1.5/1.8/2.5/3.3 V), enabling direct interface to mixed-voltage FPGAs and processors
Configurable spread spectrum	Per-output SSC with programmable spread (0.5–5.0%), modulation rate (33–63 kHz), and direction (down-spread default)

Applications

PCIe Gen 3/4 Root Complex	Ethernet Switch Timing
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe endpoints and root ports in server motherboard designs. IC Role / Device Role / Timing Role: Quad-output clock generator delivering PCIe-compliant common clock with sub-0.45 ps RMS jitter and SRNS support. Use Value: Eliminates need for four discrete oscillators; ensures deterministic inter-lane skew (<100 ps) and meets PCIe Base Spec 4.0 jitter limits.	Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs, MACs, and packet buffers in enterprise switches. IC Role / Device Role / Timing Role: Programmable multi-frequency source supporting IEEE 802.3 standards with low additive jitter in buffer mode. Use Value: Enables single-device timing for mixed-speed Ethernet interfaces while maintaining <1 ps RMS jitter at 156.25 MHz.
Broadcast Video Sync	FPGA/ASIC Clocking
Use Scenario: Delivering SMPTE ST 2059-2–compliant 27 MHz, 74.25 MHz, and 148.5 MHz clocks to video encoders, decoders, and frame synchronizers. IC Role / Device Role / Timing Role: Precision any-frequency generator with programmable phase offset (±45 ns) and <20 ps step resolution. Use Value: Enables frame-accurate genlock across multiple video processing blocks using a single Si5338A-B05808-GMR device.	Use Scenario: Supplying core, I/O, and transceiver clocks to Xilinx Versal and Intel Agilex FPGAs requiring multiple voltage domains and jitter-sensitive SerDes lanes. IC Role / Device Role / Timing Role: Configurable clock source with independent VDDO per output bank and LVDS/HCSL/LVPECL format support. Use Value: Reduces board space and BOM count while meeting FPGA vendor jitter specs (e.g., <0.5 ps RMS for 28+ Gbps PAM4 links).

PCIe Gen 3/4 Root Complex

Ethernet Switch Timing

Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe endpoints and root ports in server motherboard designs.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering PCIe-compliant common clock with sub-0.45 ps RMS jitter and SRNS support.

Use Value: Eliminates need for four discrete oscillators; ensures deterministic inter-lane skew (<100 ps) and meets PCIe Base Spec 4.0 jitter limits.

Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs, MACs, and packet buffers in enterprise switches.

IC Role / Device Role / Timing Role: Programmable multi-frequency source supporting IEEE 802.3 standards with low additive jitter in buffer mode.

Use Value: Enables single-device timing for mixed-speed Ethernet interfaces while maintaining <1 ps RMS jitter at 156.25 MHz.

Broadcast Video Sync

FPGA/ASIC Clocking

Use Scenario: Delivering SMPTE ST 2059-2–compliant 27 MHz, 74.25 MHz, and 148.5 MHz clocks to video encoders, decoders, and frame synchronizers.

IC Role / Device Role / Timing Role: Precision any-frequency generator with programmable phase offset (±45 ns) and <20 ps step resolution.

Use Value: Enables frame-accurate genlock across multiple video processing blocks using a single Si5338A-B05808-GMR device.

Use Scenario: Supplying core, I/O, and transceiver clocks to Xilinx Versal and Intel Agilex FPGAs requiring multiple voltage domains and jitter-sensitive SerDes lanes.

IC Role / Device Role / Timing Role: Configurable clock source with independent VDDO per output bank and LVDS/HCSL/LVPECL format support.

Use Value: Reduces board space and BOM count while meeting FPGA vendor jitter specs (e.g., <0.5 ps RMS for 28+ Gbps PAM4 links).

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5338A-B05809-GMR	Same silicon; factory-programmed with different default configuration (B05809 vs B05808)	Pre-configured for alternate frequency set; requires reprogramming for identical behavior	Select B05808-GMR when default configuration matches PCIe Gen 4 100 MHz + 125 MHz + 156.25 MHz + 312.5 MHz output set
LMK04832ISQE/NOPB	Two PLLs + eight outputs; higher power (120 mA typ); supports JESD204B deterministic latency	Targeted at RF/data converter timing; lacks PCIe SRNS certification and integrated crystal drive	Choose LMK04832 for JESD204B systems requiring sub-ns deterministic delay; not drop-in for PCIe Gen 4 clock trees

Compared with Si5338A-B05809-GMR, the SI5338A-B05808-GMR offers identical silicon performance but ships with a PCIe-optimized factory configuration; versus LMK04832, it delivers lower power, smaller footprint, and certified PCIe jitter compliance-but lacks dual-loop latency control for converter synchronization.

Availability

SI5338A-B05808-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 server motherboards, 10 GbE switch fabric timing, and broadcast video equipment requiring stable component supply, long-term lifecycle support, and guaranteed green material compliance.

Supply support for SI5338A-B05808-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for infrastructure, automotive, and mobile markets.

The Si5338 product line delivers programmable, low-jitter clock generation for high-speed serial interfaces-including PCIe, Ethernet, Fibre Channel, and broadcast video-enabling flexible, space-efficient timing architectures in dense PCB layouts.

FAQ

What is the factory-programmed configuration of the SI5338A-B05808-GMR?

The SI5338A-B05808-GMR is pre-programmed with a PCIe Gen 4–optimized configuration: four outputs set to 100 MHz (HCSL), 125 MHz (LVDS), 156.25 MHz (LVDS), and 312.5 MHz (LVDS), all with 0 ppm error, 1.8 V VDDO, and default spread-spectrum disabled. Configuration can be fully reprogrammed via I²C using ClockBuilder Pro software.

Does the SI5338A-B05808-GMR support crystal oscillator input?

Yes, the SI5338A-B05808-GMR supports external crystals from 8 to 30 MHz on IN1/IN2 pins. It integrates on-chip load capacitance (11–13 pF supported, 17–19 pF recommended) and drives crystals with ≤100 µW max drive level, eliminating need for external capacitors or buffer amplifiers in most designs.

Can the SI5338A-B05808-GMR generate frequencies above 350 MHz on all four outputs simultaneously?

No. The SI5338A-B05808-GMR supports only two unique frequencies above 350 MHz simultaneously-specifically Fvco/4 and Fvco/6-due to VCO frequency constraints. Outputs above 350 MHz must share one of these two synthesized frequencies; other outputs are limited to ≤350 MHz (e.g., LVPECL up to 710 MHz, but only two such outputs allowed).

How does the SI5338A-B05808-GMR achieve PCIe Gen 3 SRNS compliance?

The SI5338A-B05808-GMR achieves PCIe Gen 3 Separate Reference No Spread (SRNS) compliance through its configurable PLL loop bandwidth (2–5 MHz range), optimized MultiSynth™ fractional-N synthesis, and validated jitter performance: 0.11–0.32 ps RMS (1.5–50 MHz band) measured per PCI-SIG requirements using Intel Clock Jitter Tool v1.6.4.

Is the SI5338A-B05808-GMR pin-compatible with other Si5338 variants?

Yes, all Si5338A/B/C/D variants-including SI5338A-B05808-GMR-are mechanically and electrically pin-compatible in the 24-QFN package. Differences lie solely in factory-programmed NVM contents and default register settings; no PCB redesign is required when substituting within the Si5338 family.

SI5338A-B05808-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338A-B05808-GMR FAQ

1.How can I place an order for SI5338A-B05808-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338A-B05808-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338A-B05808-GMR reliable?

The price and inventory of SI5338A-B05808-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338A-B05808-GMR is usually 5 days.

3.What payment methods are accepted for SI5338A-B05808-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338A-B05808-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338A-B05808-GMR?

SI5338A-B05808-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338A-B05808-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338A-B05808-GMR?

For technical support, including SI5338A-B05808-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338A-B05808-GMR requirements.

6.How does Aetrix verify that SI5338A-B05808-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338A-B05808-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338A-B05808-GMR meets industry standards.

7.What is the process for return or replacement of SI5338A-B05808-GMR?

All SI5338A-B05808-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338A-B05808-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338A-B05808-GMR part is unused and in its original packaging.

Return procedure for SI5338A-B05808-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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