Skyworks Solutions Inc. SI5338A-B05991-GMR

Overview

SI5338A-B05991-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338A-B05991-GMR datasheet, SI5338A-B05991-GMR pinout, SI5338A-B05991-GMR application, or SI5338A-B05991-GMR equivalent, key selection criteria include PCIe Gen 4 jitter compliance (0.15–0.45 ps RMS), independent output voltage per driver (1.5/1.8/2.5/3.3 V), MultiSynth™ fractional synthesis resolution (1 ppb), spread-spectrum control (0.5–5.0% down-spread), and I²C/SMBus programmability with ClockBuilder Pro support.

Technical Context

The SI5338A-B05991-GMR implements a two-stage PLL architecture: a high-stability reference stage (input frequency 5–710 MHz) followed by four independent MultiSynth™ synthesis blocks, each supporting integer or fractional-N division with <20 ps phase step accuracy and 1 ppm frequency increment/decrement. Its output stage supports mixed-signal formats (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL) on up to eight single-ended or four differential outputs.

It features loss-of-lock and loss-of-signal alarms, external feedback mode for zero-delay operation, and configurable spread spectrum on any output (33–63 kHz modulation rate, 0.5–5.0% spread). The device uses on-chip OTP NVM for factory programming and supports dynamic reconfiguration via I²C without interrupting output clocks.

Key Specifications

Pinout & Package

SI5338A-B05991-GMR is housed in a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed per Si5338 family specification.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Compared with Si5332A-D05989-GM and ICS853S01AGI-01LFT, SI5338A-B05991-GMR delivers optimal balance of field-programmability, PCIe Gen 4 compliance, compact 4 × 4 mm footprint, and mixed-signal flexibility-making it ideal for mid-complexity, production-ready systems requiring design reuse and future-proofing without over-engineering.

Availability

SI5338A-B05991-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switching/routing, and broadcast video timing applications requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338A-B05991-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 product line was designed to replace multiple discrete oscillators with a single, software-configurable clock generator for high-speed serial interfaces-including PCIe, Ethernet, Fibre Channel, and broadcast video-while meeting stringent jitter and reliability requirements.

FAQ

What is the maximum output frequency supported by SI5338A-B05991-GMR?

The SI5338A-B05991-GMR supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, 250 MHz on HCSL, and 200 MHz on CMOS. However, only two unique frequencies above 350 MHz can be generated simultaneously (Fvco/4 and Fvco/6), as specified in the functional description section of the datasheet. All frequencies are synthesized with MultiSynth™ technology and maintain 0.7 ps RMS typical jitter.

Does SI5338A-B05991-GMR support PCIe Gen 4 Common Clock architecture?

Yes, SI5338A-B05991-GMR is explicitly compliant with PCIe Gen 4 Common Clock requirements per the PCI-Express Base Specification 4.0 rev 0.5, delivering 0.15–0.45 ps RMS jitter under defined test conditions (100 MHz HCSL outputs, PLL BW 2–5 MHz, CDR = 10 MHz). This compliance is verified using the Skyworks PCIe Clock Jitter Tool and Intel Clock Jitter Tool v1.6.4.

Can SI5338A-B05991-GMR generate different output voltages on each channel?

Yes, SI5338A-B05991-GMR provides independent VDDO0–VDDO3 supplies, allowing each of its four output banks to operate at 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This enables direct interfacing with mixed-voltage SoCs, FPGAs, and ASICs without external level shifters-e.g., driving 1.8 V LVDS SerDes and 3.3 V CMOS peripherals from the same device.

How is SI5338A-B05991-GMR programmed, and is external hardware required?

SI5338A-B05991-GMR is programmed via its I²C/SMBus-compatible interface (SCL/SDA pins) using Skyworks' ClockBuilder Pro software. No external programmer is required-standard I²C host controllers or evaluation boards (e.g., Si5338-EVB) suffice. Configuration can be stored in on-chip OTP NVM for autonomous startup, or dynamically updated in-system without disrupting output clocks.

What input reference sources does SI5338A-B05991-GMR accept?

SI5338A-B05991-GMR accepts multiple reference types: external crystals (8–30 MHz), single-ended CMOS clocks (5–200 MHz), SSTL/HSTL inputs (5–350 MHz), and differential inputs (5–710 MHz on IN1/IN2 or IN5/IN6). Input flexibility allows use with legacy oscillators, FPGA clocks, or high-speed serial receivers-enabling reuse of existing timing infrastructure.