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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338A-B08772-GM

Name: SI5338A-B08772-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338A-B08772-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338A-B08772-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338A-B08772-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338A-B08772-GM from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 and SRNS compliance, and MultiSynth™ frequency synthesis supporting 0.16–710 MHz output ranges across LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338A-B08772-GM datasheet, SI5338A-B08772-GM pinout, SI5338A-B08772-GM application, or SI5338A-B08772-GM equivalent, key selection considerations include its 24-QFN package, independent per-output voltage (1.5/1.8/2.5/3.3 V), ±20 ps phase step resolution, spread-spectrum capability (0.5–5.0% at 33–63 kHz), and support for external crystal (8–30 MHz) or wideband differential inputs (5–710 MHz).

Technical Context

The SI5338A-B08772-GM implements a two-stage PLL architecture: a high-stability reference PLL (Stage 1) locks to one of six input sources, followed by four independent MultiSynth™ fractional-N synthesizers (Stage 2) generating each output with integer or fractional division. Its output stage supports mixed signal formats and per-driver supply voltages.

It features loss-of-lock and loss-of-signal monitoring, programmable initial phase offset (±45 ns), glitchless frequency increment/decrement (1 ppm steps), and zero-delay mode via external feedback. All configuration is stored in on-chip OTP NVM and accessible via I²C/SMBus at up to 400 kHz.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typ (12 kHz–20 MHz); meets PCIe Gen 3/4 SRNS and GbE jitter requirements
Output Frequency Range	0.16–710 MHz; supports LVPECL/LVDS (≤710 MHz), HCSL (≤250 MHz), CMOS (≤200 MHz), SSTL/HSTL (≤350 MHz)
Input Reference Support	External crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Supply Voltages	Core: 1.8/2.5/3.3 V; Output buffers: independently configurable 1.5/1.8/2.5/3.3 V per driver
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch; RoHS-compliant, moisture sensitivity level 3
Operating Temperature	–40 °C to +85 °C ambient; qualified per industrial-grade reliability standards
Power Consumption	45 mA typ core current (100 MHz on all outputs, 25 MHz refclk); <12 mA in buffer-only mode

Pinout & Package

SI5338A-B08772-GM is housed in a 24-lead, 4 mm × 4 mm QFN package with exposed thermal pad. Pin 1 is top-left corner (IN1), pins numbered counter-clockwise. Package complies with JEDEC MO-220, lead-free, halogen-free, and RoHS-compliant.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential input pairs	Accept AC-coupled differential clocks up to 710 MHz; require external 100 Ω termination
IN3, IN4	Single-ended input pins	Support CMOS/SSTL/HSTL inputs (5–350 MHz); VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A/CLK0B – CLK3A/CLK3B	Differential output pairs	Four independent output drivers; each configurable for LVPECL/LVDS/HCSL/CML with selectable VDDOx
VDDO0–VDDO3	Output buffer supplies	Independent 1.5/1.8/2.5/3.3 V supplies per output pair; decoupling required per pin
VDD	Core supply	Single 1.8/2.5/3.3 V supply for internal logic and PLL; PSRR optimized for noise rejection
SCL, SDA	I²C interface	Standard-mode (100 kHz) or fast-mode (400 kHz) I²C bus; SMBus-compatible, pull-up required
INTR	Interrupt output	Open-drain status indicator for loss-of-lock, loss-of-signal, or configuration errors
RSVD_GND	Reserved ground	Internal test pin; must be connected to GND per layout guidelines

Key Features

Feature	Design Value
MultiSynth™ synthesis	Four independent fractional-N synthesizers enabling true zero-ppm accuracy on all outputs simultaneously
PCIe Gen 4 Common Clock compliance	0.15–0.45 ps RMS jitter (10 kHz–50 MHz) verified per PCIe Base Spec 4.0 rev 0.5
Per-output format & voltage control	Each of four output pairs supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL with independent VDDOx (1.5–3.3 V)
Glitchless frequency tuning	Hardware-supported frequency increment/decrement in 1 ppm steps without output interruption
Programmable spread spectrum	Configurable SSC on any output: 0.5–5.0% spread, 33–63 kHz modulation rate, down-spread default
Zero-delay mode	External feedback path enables deterministic latency alignment between input and selected output(s)

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch/Routing
Use Scenario: Providing synchronized, low-jitter reference clocks to multiple PCIe Gen 4 switch ASICs in a data center fabric card. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent 100 MHz HCSL clocks meeting PCIe Gen 4 SRNS jitter spec (≤0.32 ps RMS). Use Value: Eliminates need for four discrete oscillators; enables board-level jitter budget margin via 0.7 ps RMS typical phase noise and independent output skew control.	Use Scenario: Generating multi-rate clocks (125 MHz, 156.25 MHz, 312.5 MHz) for 1G/10G/25G Ethernet PHYs and MACs on a carrier-grade switch line card. IC Role / Device Role / Timing Role: Any-frequency synthesizer producing precise Ethernet-compliant frequencies from a single 25 MHz crystal reference. Use Value: Reduces BOM count and layout complexity while maintaining sub-1 ps RMS jitter across all rates via MultiSynth™ integer-mode operation.
Broadcast Video Timing	FPGA Processor Clocking
Use Scenario: Delivering frame-synchronized pixel clocks (e.g., 74.25 MHz, 148.5 MHz) and audio word clocks (e.g., 48 kHz, 96 kHz) in SMPTE ST 2110 IP video transport systems. IC Role / Device Role / Timing Role: Quad-output generator providing jitter-clean, phase-aligned clocks with programmable initial offset for genlock and lip-sync alignment. Use Value: Enables sub-20 ps phase step resolution and ±45 ns programmable offset to meet SMPTE ST 2059-2 synchronization tolerance.	Use Scenario: Supplying core, memory, and peripheral clocks to Xilinx Versal or Intel Agilex FPGAs in adaptive compute acceleration platforms. IC Role / Device Role / Timing Role: Configurable clock source supporting mixed-voltage domains (1.0 V core, 1.2 V memory, 1.8 V I/O) with independent output format selection. Use Value: Simplifies FPGA clock tree design by replacing multiple dedicated clock ICs; supports dynamic reconfiguration via I²C during runtime.

PCIe Gen 4 Switch Timing

Ethernet Switch/Routing

Use Scenario: Providing synchronized, low-jitter reference clocks to multiple PCIe Gen 4 switch ASICs in a data center fabric card.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent 100 MHz HCSL clocks meeting PCIe Gen 4 SRNS jitter spec (≤0.32 ps RMS).

Use Value: Eliminates need for four discrete oscillators; enables board-level jitter budget margin via 0.7 ps RMS typical phase noise and independent output skew control.

Use Scenario: Generating multi-rate clocks (125 MHz, 156.25 MHz, 312.5 MHz) for 1G/10G/25G Ethernet PHYs and MACs on a carrier-grade switch line card.

IC Role / Device Role / Timing Role: Any-frequency synthesizer producing precise Ethernet-compliant frequencies from a single 25 MHz crystal reference.

Use Value: Reduces BOM count and layout complexity while maintaining sub-1 ps RMS jitter across all rates via MultiSynth™ integer-mode operation.

Broadcast Video Timing

FPGA Processor Clocking

Use Scenario: Delivering frame-synchronized pixel clocks (e.g., 74.25 MHz, 148.5 MHz) and audio word clocks (e.g., 48 kHz, 96 kHz) in SMPTE ST 2110 IP video transport systems.

IC Role / Device Role / Timing Role: Quad-output generator providing jitter-clean, phase-aligned clocks with programmable initial offset for genlock and lip-sync alignment.

Use Value: Enables sub-20 ps phase step resolution and ±45 ns programmable offset to meet SMPTE ST 2059-2 synchronization tolerance.

Use Scenario: Supplying core, memory, and peripheral clocks to Xilinx Versal or Intel Agilex FPGAs in adaptive compute acceleration platforms.

IC Role / Device Role / Timing Role: Configurable clock source supporting mixed-voltage domains (1.0 V core, 1.2 V memory, 1.8 V I/O) with independent output format selection.

Use Value: Simplifies FPGA clock tree design by replacing multiple dedicated clock ICs; supports dynamic reconfiguration via I²C during runtime.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output programmable clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D08772-GM	Higher integration: integrated crystal option, lower jitter (0.35 ps RMS), supports up to 10 outputs, wider frequency range (up to 3.2 GHz)	Targeted at next-gen PCIe 5.0, CXL, and 400G/800G optical modules requiring tighter jitter and higher frequencies	Select when PCIe 5.0 compliance, ultra-low jitter, or >4 outputs are required; not drop-in compatible due to different pinout and register map
ICS853S01AGI-01LFT	Fixed-function 4-output LVDS clock generator; no I²C programming; max 700 MHz output; 1.2 ps RMS jitter	Used in cost-sensitive, static-clocking applications where frequency flexibility is not needed	Select only for fixed-frequency designs with no requirement for dynamic reconfiguration or mixed signal formats

Compared with Si5332A-D08772-GM and ICS853S01AGI-01LFT, the SI5338A-B08772-GM delivers optimal balance of programmability, industrial temperature support, PCIe Gen 4 readiness, and QFN footprint-making it ideal for field-deployable infrastructure equipment where firmware-updatable timing is essential.

Availability

SI5338A-B08772-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, broadcast video synchronization, and FPGA processor clocking requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5338A-B08772-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The SI5338 family is engineered for high-performance, software-configurable clock generation in datacenter, telecom, and broadcast systems-emphasizing jitter performance, multi-protocol compliance, and field-upgradable timing flexibility.

FAQ

What is the maximum output frequency supported by SI5338A-B08772-GM in LVPECL mode?

The SI5338A-B08772-GM supports up to 710 MHz in LVPECL mode when operating in integer synthesis mode. Frequencies above 350 MHz are limited to two unique outputs simultaneously (Fvco/4 and Fvco/6), as specified in the functional description section of the datasheet. This constraint ensures phase noise and jitter performance remain within specification across all active outputs.

Does SI5338A-B08772-GM support PCIe Gen 4 Separate Reference No Spread (SRNS) mode?

Yes, SI5338A-B08772-GM is explicitly validated for PCIe Gen 4 SRNS operation with 0.11–0.32 ps RMS jitter (10 kHz–50 MHz) under 2–5 MHz PLL bandwidth and 10 MHz CDR conditions. The device's low intrinsic jitter, programmable loop bandwidth, and deterministic phase alignment capabilities meet PCI-SIG Gen 4 SRNS requirements without external components.

Can SI5338A-B08772-GM generate four different output frequencies simultaneously?

Yes, SI5338A-B08772-GM uses four independent MultiSynth™ engines to synthesize four distinct frequencies simultaneously-from 0.16 MHz to 710 MHz-with zero ppm error. Each output is fully programmable for frequency, format, voltage, phase offset, and spread-spectrum parameters via I²C, enabling true multi-rate clocking from a single chip.

What crystal load capacitance does SI5338A-B08772-GM support internally?

SI5338A-B08772-GM supports internal crystal load capacitance settings of 11–13 pF (configurable via registers) for crystals ranging from 8–30 MHz. Recommended external crystal load capacitance remains 17–19 pF; AN360 provides register adjustment guidance to accommodate 12 pF crystals using the on-chip CL tuning feature.

Is SI5338A-B08772-GM pin-compatible with other Si5338 variants like SI5338B or SI5338C?

No, SI5338A-B08772-GM is not pin-compatible with SI5338B or SI5338C variants. While all share the same 24-QFN package and pinout, differences in internal oscillator architecture, input multiplexing, and register mapping mean hardware and firmware changes are required for substitution. Always verify variant-specific electrical and timing behavior before replacement.

SI5338A-B08772-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Obsolete

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338A-B08772-GM FAQ

1.How can I place an order for SI5338A-B08772-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338A-B08772-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338A-B08772-GM reliable?

The price and inventory of SI5338A-B08772-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338A-B08772-GM is usually 5 days.

3.What payment methods are accepted for SI5338A-B08772-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338A-B08772-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338A-B08772-GM?

SI5338A-B08772-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338A-B08772-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338A-B08772-GM?

For technical support, including SI5338A-B08772-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338A-B08772-GM requirements.

6.How does Aetrix verify that SI5338A-B08772-GM is sourced from the original manufacturer or authorized distributors?

All SI5338A-B08772-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338A-B08772-GM meets industry standards.

7.What is the process for return or replacement of SI5338A-B08772-GM?

All SI5338A-B08772-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338A-B08772-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338A-B08772-GM part is unused and in its original packaging.

Return procedure for SI5338A-B08772-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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