Skyworks Solutions Inc. SI5338A-B09174-GMR

Overview

SI5338A-B09174-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation from 1.8/2.5/3.3 V core supply in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338A-B09174-GMR datasheet, SI5338A-B09174-GMR pinout, SI5338A-B09174-GMR application, or SI5338A-B09174-GMR equivalent, key selection considerations include its MultiSynth™-based any-frequency synthesis (0.16–710 MHz per output), independent output voltage per driver (1.5–3.3 V), spread-spectrum capability (0.5–5.0% down-spread), and loss-of-lock/loss-of-signal alarm support.

Technical Context

The SI5338A-B09174-GMR implements a two-stage PLL architecture: a high-stability reference PLL (Stage 1) locks to one of six input sources (crystal, CMOS, SSTL/HSTL, or differential), followed by four independent MultiSynth™ fractional-N synthesizers (Stage 2) generating outputs with true zero-ppm accuracy. Each output path includes programmable phase offset (<20 ps step), frequency increment/decrement (1 ppm step), and spread-spectrum modulation (33–63 kHz rate).

It supports flexible input referencing - external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) - and delivers configurable output formats: LVPECL/LVDS (0.16–710 MHz), HCSL (0.16–250 MHz), CMOS (0.16–200 MHz), and SSTL/HSTL (0.16–350 MHz), with independent VDDO per driver.

Key Specifications

Pinout & Package

SI5338A-B09174-GMR is housed in a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are standardized across Si5338 variants per Skyworks documentation (Rev. 1.6, p.33–37).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Compared with SI5338A-B09174-GMR, Si5338A-B09175-GMR offers identical electrical performance and pinout but ships with telecom-optimized firmware, while LMK04832RHAR provides lower jitter and more outputs at the cost of larger footprint and higher power - making SI5338A-B09174-GMR optimal for space-constrained PCIe/Ethernet timing where factory-programmable flexibility is prioritized.

Availability

SI5338A-B09174-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 root complex timing, 10G/25G Ethernet switch clocking, and broadcast video synchronization requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for SI5338A-B09174-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The Si5338 product line was designed to replace multiple fixed-frequency oscillators with a single programmable clock generator for high-speed serial interfaces - targeting PCIe, Ethernet, Fibre Channel, and telecom applications demanding low jitter and flexible frequency synthesis.

FAQ

What is the primary function of the SI5338A-B09174-GMR?

The SI5338A-B09174-GMR is an I²C-programmable quad clock generator that synthesizes up to four independent, low-jitter output frequencies from a single reference input. Its core function is to replace multiple discrete oscillators in systems requiring precise, flexible timing - such as PCIe Gen 4, 10G Ethernet, and broadcast video equipment - while maintaining 0.7 ps RMS typical phase jitter and full configurability via ClockBuilder Pro software.

Does the SI5338A-B09174-GMR support PCIe Gen 4 timing requirements?

Yes, the SI5338A-B09174-GMR meets PCIe Gen 4 common clock jitter specifications with ≤0.45 ps RMS (12 kHz–20 MHz) when configured per Skyworks' recommended settings (PLL bandwidth 2–5 MHz, CDR = 10 MHz). This compliance is verified in Table 12 of the official datasheet (Rev. 1.6) and confirmed using the Skyworks PCIe Clock Jitter Tool. The SI5338A-B09174-GMR also satisfies Gen 3 SRNS (≤0.32 ps RMS) and Gen 1/2 requirements.

Can the SI5338A-B09174-GMR generate different output formats simultaneously?

Yes, the SI5338A-B09174-GMR supports mixed output formats across its four differential output pairs (CLK0–CLK3): for example, CLK0A/B as LVDS, CLK1A/B as HCSL, CLK2A/B as LVPECL, and CLK3A/B as CML - each with independent VDDO supply (1.5/1.8/2.5/3.3 V). This capability is enabled by per-output driver configuration registers and is documented in Section 3.4 ("Output Stage") of the datasheet.

What reference inputs does the SI5338A-B09174-GMR accept?

The SI5338A-B09174-GMR accepts six reference input types: (1) 8–30 MHz fundamental-mode crystal (internally loaded), (2) 5–200 MHz CMOS (IN3/IN4), (3) 5–350 MHz SSTL/HSTL (IN3/IN4), (4) 5–710 MHz differential (IN1/IN2 or IN5/IN6), (5) 5–350 MHz differential (IN3/IN4 with AC coupling), and (6) external feedback for zero-delay mode. Input validation and automatic source selection are handled in hardware per Section 3.2 of the datasheet.

How is the SI5338A-B09174-GMR programmed and configured?

The SI5338A-B09174-GMR is programmed via its I²C/SMBus-compatible interface (SCL/SDA pins) using Skyworks' ClockBuilder Pro software, which auto-generates register maps, validates configurations, and exports .c files for embedded initialization. Factory OTP memory stores the default configuration; runtime reprogramming supports dynamic frequency/phase/spread-spectrum updates without reset. All register definitions and timing are specified in Sections 5 and 6 of the datasheet.