Skyworks Solutions Inc. SI5338B-B03800-GMR
- Part No.:
- SI5338B-B03800-GMR
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Application Specific Clock/Timing
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
SI5338B-B03800-GMR.pdf
- Description:
- I2C CONTROL, 4-OUTPUT, ANY FREQU
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI5338B-B03800-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 and SRNS compliance, and MultiSynth™ frequency synthesis supporting 0.16–710 MHz output ranges. It replaces up to four crystal oscillators in FPGA, processor, and Ethernet switch timing systems.
For engineers reviewing the SI5338B-B03800-GMR datasheet, SI5338B-B03800-GMR pinout, SI5338B-B03800-GMR application, or SI5338B-B03800-GMR equivalent, key selection criteria include its 24-QFN package, independent per-output voltage (1.5/1.8/2.5/3.3 V), spread-spectrum capability (0.5–5.0% down-spread), glitchless 1 ppm frequency adjustment, and <20 ps phase step resolution.
Technical Context
The SI5338B-B03800-GMR implements a two-stage PLL architecture: a high-stability reference stage (with crystal or external clock input) feeding a fractional-N MultiSynth™ synthesis stage per output. Each of the four outputs uses dedicated M/N/R dividers and supports integer or fractional mode operation with programmable initial phase offset (±45 ns) and real-time phase/frequency increment/decrement control.
It accepts six input sources (IN1–IN6): differential (5–710 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or 8–30 MHz crystal. Output drivers support LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats with independent VDDO supplies and configurable slew rates, enabling direct interface to FPGAs, ASICs, and SerDes PHYs without level-shifting components.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Phase Jitter (RMS) | 0.7 ps typ (12 kHz–20 MHz); meets PCIe Gen 3/4 SRNS and GbE jitter requirements |
| Output Frequency Range | 0.16–710 MHz; supports LVPECL/LVDS up to 710 MHz, HCSL up to 250 MHz, CMOS up to 200 MHz |
| Input Reference Support | Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz) |
| Supply Voltages | Core: 1.8/2.5/3.3 V; Output buffers: independently configurable 1.5/1.8/2.5/3.3 V per driver |
| Spread Spectrum | Configurable on any output: 5–350 MHz range, 0.5–5.0% spread, 33–63 kHz modulation rate |
| Package | 24-pin QFN, 4 × 4 mm, 0.5 mm pitch; RoHS-compliant, halogen-free |
| Operating Temperature | –40 °C to +85 °C; qualified for industrial and telecom line card environments |
Pinout & Package
SI5338B-B03800-GMR is housed in a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed per the Si5338 family and validated for this variant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN1, IN2 | Differential input pair | Accepts 5–710 MHz AC-coupled differential clock; internal 100 Ω termination enabled |
| IN3, IN4 | Single-ended input pair | Supports CMOS/SSTL/HSTL inputs (5–350 MHz); each pin configurable as separate input |
| IN5, IN6 | Differential input pair | Second differential input channel; identical specs to IN1/IN2 |
| CLK0A, CLK0B | Differential output pair | Output 0; format and voltage (VDDO0) independently configurable |
| CLK1A, CLK1B | Differential output pair | Output 1; supports same formats/frequencies as CLK0A/B |
| CLK2A, CLK2B | Differential output pair | Output 2; fully independent frequency, format, and VDDO2 supply |
| CLK3A, CLK3B | Differential output pair | Output 3; enables four simultaneous any-frequency clocks |
| SCL, SDA | I²C interface | Standard SMBus-compatible serial bus (up to 400 kHz); used for configuration and status readback |
| INTR | Interrupt output | Open-drain alarm signal for loss-of-lock (LOL) and loss-of-signal (LOS) |
| VDD, VDDO0–VDDO3 | Power supplies | VDD = core supply (1.8/2.5/3.3 V); VDDOx = per-output buffer supply (1.5/1.8/2.5/3.3 V) |
| GND, RSVD_GND | Ground terminals | Eight ground pins including dedicated thermal pad connection; critical for low-jitter performance |
Key Features
| Feature | Design Value |
|---|---|
| MultiSynth™ synthesis per output | Enables true zero-ppm frequency accuracy across all four outputs simultaneously, eliminating need for multiple crystals |
| Independent per-output voltage control | Each output driver powered by dedicated VDDO supply (1.5/1.8/2.5/3.3 V), allowing mixed-voltage system interfacing without external level shifters |
| Glitchless frequency tuning | 1 ppm step size with pin- or I²C-controlled increment/decrement; no output interruption during dynamic frequency changes |
| Programmable phase alignment | <20 ps step resolution and ±45 ns range per output; enables precise skew management across multi-lane SerDes or memory interfaces |
| PCIe Gen 4 Common Clock compliance | 0.15–0.45 ps RMS jitter (10 kHz–50 MHz) in common-clock mode; validated per PCI-SIG Base Spec 4.0 rev 0.5 |
| External feedback mode | Supports zero-delay operation for clock distribution networks where output must mirror input phase with minimal latency |
Applications
| Ethernet Switch Timing | PCIe Gen 4 Server Platform |
|---|---|
Use Scenario: High-density 10GbE/25GbE switch ASIC requiring synchronized clocks for packet processing, MAC, and PHY layers. IC Role / Device Role / Timing Role: Quad clock generator providing independent 156.25 MHz (MAC), 312.5 MHz (PHY), 125 MHz (management), and 100 MHz (control plane) clocks. Use Value: Eliminates four discrete oscillators; achieves sub-0.5 ps inter-output skew and PCIe Gen 4-compliant jitter on all outputs. |
Use Scenario: Dual-CPU server motherboard with PCIe Gen 4 x16 slots, NVMe storage, and PLX switches demanding strict common-clock jitter compliance. IC Role / Device Role / Timing Role: Primary clock source delivering 100 MHz common reference to CPU, chipset, and add-in cards while supporting SRNS mode for root complex. Use Value: Meets PCIe Gen 4 SRNS RMS jitter limit (≤0.32 ps) and enables single-device clock tree simplification versus multi-oscillator solutions. |
| FPGA-Based Video Processing | Telecom Line Card Synchronization |
Use Scenario: Broadcast video encoder using Xilinx Ultrascale+ FPGA with multiple clock domains for HDMI TX, DDR4 memory, and PCIe host interface. IC Role / Device Role / Timing Role: Configurable clock synthesizer generating 297 MHz (HDMI), 1200 MHz (DDR4), 100 MHz (PCIe), and 27 MHz (system control) from one 25 MHz crystal. Use Value: Reduces BOM count and board space; leverages independent phase adjustment to align DDR4 DQS strobes with clock edges. |
Use Scenario: OTN/SDH line card requiring synchronous Ethernet (SyncE) and IEEE 1588 PTP timing with holdover stability. IC Role / Device Role / Timing Role: Timing IC accepting 19.44 MHz OC-12 reference and generating 155.52 MHz (SONET), 622.08 MHz (OC-24), 125 MHz (Ethernet), and 10 MHz (PTP recovery). Use Value: Achieves 0.7 ps RMS OC-12 jitter compliance and supports external crystal for holdover during reference loss. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5338A-B03800-GM | Same pinout and register map; differs only in factory-programmed NVM configuration (A vs B variant) | Pre-configured for different default output frequencies and formats; requires reprogramming via ClockBuilder Pro for identical behavior | Select when pre-loaded firmware matches target system's boot-time clock requirements without I²C initialization |
| LMK04832ISQE/NOPB | Two PLLs (vs one reference + four MultiSynths); higher power (125 mA vs 45 mA); larger 48-QFN package | Better suited for ultra-low-jitter (<0.1 ps) RF and instrumentation; over-specified for standard PCIe/Ethernet timing | Choose only if sub-0.2 ps RMS jitter or dual-loop redundancy is required; otherwise SI5338B-B03800-GMR offers superior integration and footprint efficiency |
Compared with Si5338A-B03800-GM, the SI5338B-B03800-GMR provides identical hardware functionality but with distinct factory OTP settings; compared with LMK04832, it delivers PCIe Gen 4 compliance at half the power and 50% smaller footprint-making it optimal for space-constrained, cost-sensitive embedded and networking platforms.
Availability
SI5338B-B03800-GMR is available at Aetrix Electronics and suitable for Ethernet switch/router design, PCIe Gen 4 server platforms, and broadcast video timing applications requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for SI5338B-B03800-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs for infrastructure, automotive, and mobile markets.
The Si5338 product line was designed specifically for high-density, multi-protocol timing consolidation in networking, computing, and communications equipment-enabling replacement of multiple discrete oscillators with a single programmable device.
FAQ
What is the default configuration of the SI5338B-B03800-GMR at power-up?
The SI5338B-B03800-GMR powers up with factory-programmed OTP settings that configure it as a quad-output clock generator with specific default frequencies, output formats, and voltage levels. These settings are non-volatile and persist without I²C programming. Full customization requires ClockBuilder Pro software and I²C initialization to overwrite the default NVM configuration.
Does the SI5338B-B03800-GMR support PCIe Gen 4 Separate Reference No Spread (SRNS) mode?
Yes, the SI5338B-B03800-GMR supports PCIe Gen 4 SRNS mode with 0.11–0.32 ps RMS jitter (10 kHz–50 MHz) when configured with a PLL bandwidth of 2–4 MHz and CDR set to 10 MHz. This is explicitly validated in Table 12 of the official datasheet and meets PCI-SIG Base Specification 4.0 rev 0.5 requirements.
Can the SI5338B-B03800-GMR generate four different frequencies simultaneously above 350 MHz?
No. The SI5338B-B03800-GMR can output only two unique frequencies above 350 MHz simultaneously-specifically Fvco/4 and Fvco/6-as stated in Note 6 of Table 6. Higher-frequency outputs require integer-related relationships and shared VCO resources; full independence is limited to frequencies ≤350 MHz.
How is spread spectrum applied on the SI5338B-B03800-GMR, and can it be enabled per output?
Spread spectrum is configurable independently on any of the four outputs of the SI5338B-B03800-GMR, with selectable parameters: frequency range (5–350 MHz), spread magnitude (0.5–5.0%), and modulation rate (33–63 kHz). It is implemented digitally within the MultiSynth™ engine and does not require external components or analog modulation circuitry.
What is the maximum allowable input slew rate for low-jitter operation of the SI5338B-B03800-GMR?
For optimal jitter performance, the SI5338B-B03800-GMR requires differential input slew rates >0.3 V/ns (measured at mid-point) on IN1/IN2/IN5/IN6, and single-ended input slew rates >1.0 V/ns on IN3/IN4. Exceeding these thresholds ensures deterministic edge detection and minimizes jitter contribution from input signal integrity degradation.
SI5338B-B03800-GMR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- MultiSynth™
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- PLL:
- -
- Main Purpose:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 24-QFN (4x4)
SI5338B-B03800-GMR FAQ
1.How can I place an order for SI5338B-B03800-GMR through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5338B-B03800-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5338B-B03800-GMR reliable?
The price and inventory of SI5338B-B03800-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338B-B03800-GMR is usually 5 days.
3.What payment methods are accepted for SI5338B-B03800-GMR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338B-B03800-GMR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5338B-B03800-GMR?
SI5338B-B03800-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5338B-B03800-GMR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5338B-B03800-GMR?
For technical support, including SI5338B-B03800-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338B-B03800-GMR requirements.
6.How does Aetrix verify that SI5338B-B03800-GMR is sourced from the original manufacturer or authorized distributors?
All SI5338B-B03800-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338B-B03800-GMR meets industry standards.
7.What is the process for return or replacement of SI5338B-B03800-GMR?
All SI5338B-B03800-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338B-B03800-GMR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5338B-B03800-GMR part is unused and in its original packaging.
Return procedure for SI5338B-B03800-GMR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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