Skyworks Solutions Inc. SI5338B-B04135-GM

Overview

SI5338B-B04135-GM from Skyworks Solutions is an I²C-programmable quad clock generator IC with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C. It replaces up to four crystal oscillators in high-speed serial interface timing applications including PCIe, Ethernet, and FPGA clocking.

For engineers reviewing the SI5338B-B04135-GM datasheet, SI5338B-B04135-GM pinout, SI5338B-B04135-GM application, or SI5338B-B04135-GM equivalent, this page delivers verified specifications, validated pin functions, confirmed PCIe Gen 4 jitter performance (0.15–0.45 ps RMS), exact MultiSynth™ synthesis resolution (1 ppb), and real-world output format support (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL).

Technical Context

The SI5338B-B04135-GM implements a two-stage PLL architecture: a high-stability reference stage (with crystal or external clock input) followed by four independent MultiSynth™ fractional-N synthesis engines per output. Each engine supports integer or fractional mode, enabling any-frequency generation from 0.16 MHz to 710 MHz with true zero-ppm accuracy when integer-divided.

It features fully independent output voltage control (1.5/1.8/2.5/3.3 V per driver), programmable phase offset (±45 ns, <20 ps step), glitchless frequency increment/decrement (1 ppm steps), and spread-spectrum capability (0.5–5.0% spread, 33–63 kHz modulation) on any output - all configured via I²C/SMBus interface with OTP NVM storage.

Key Specifications

Pinout & Package

SI5338B-B04135-GM uses a 24-pin QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin numbering follows standard top-view layout with Pin 1 at top-left corner (IN1), progressing counter-clockwise.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output clock generator applications.

Compared with Si5338A-B04135-GM, the SI5338B-B04135-GM delivers identical hardware functionality but ships with PCIe Gen 4–optimized firmware; versus LMK04832RHAT, it provides four independent synthesis paths in half the package size and 62% lower core current - making it optimal for space-constrained, multi-protocol serial timing systems.

Availability

SI5338B-B04135-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, 10 GbE routing, and FPGA clocking applications requiring stable component supply, long-term lifecycle assurance, and guaranteed traceable sourcing.

Supply support for SI5338B-B04135-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog ICs for infrastructure, automotive, and mobile markets.

The Si5338 family is engineered as a programmable any-frequency clock generator platform targeting high-speed serial interface timing - specifically designed to replace multiple fixed-frequency oscillators while meeting stringent jitter and protocol compliance requirements for PCIe, Ethernet, and broadcast video systems.

FAQ

What is the primary function of the SI5338B-B04135-GM?

The SI5338B-B04135-GM is an I²C-programmable quad clock generator IC that synthesizes four independent, low-jitter output clocks from a single reference input. It replaces up to four discrete oscillators in applications such as PCIe Gen 4, 10 GbE, and FPGA clocking - delivering frequencies from 0.16 MHz to 710 MHz with 0.7 ps RMS typical phase jitter and true zero-ppm accuracy in integer mode.

Does the SI5338B-B04135-GM support PCIe Gen 4 timing requirements?

Yes, the SI5338B-B04135-GM is explicitly validated for PCIe Gen 4 Common Clock operation, achieving 0.15–0.45 ps RMS jitter (12 kHz–20 MHz) per PCIe Base Specification 4.0 rev 0.5. Its PLL bandwidth (2–5 MHz) and CDR lock capability at 10 MHz meet SRNS compliance requirements - confirmed in Skyworks' official characterization data and supported by the PCIe Clock Jitter Tool.

How many output formats does the SI5338B-B04135-GM support per channel?

The SI5338B-B04135-GM supports LVPECL, LVDS, HCSL, CML, CMOS, SSTL, and HSTL output formats - with each of its four output drivers independently configurable for format, frequency, voltage (1.5/1.8/2.5/3.3 V), and termination. Format selection is register-controlled and does not require hardware changes; for example, CLK0A/CLK0B can be LVDS while CLK2A/CLK2B operate as CMOS.

What reference inputs are compatible with the SI5338B-B04135-GM?

The SI5338B-B04135-GM accepts multiple reference sources: an 8–30 MHz fundamental-mode crystal (internally loaded), a 5–200 MHz CMOS clock on IN3/IN4, a 5–350 MHz SSTL/HSTL signal, or a 5–710 MHz differential clock on IN1/IN2 or IN5/IN6. All inputs support automatic loss-of-signal detection with configurable release time (0.01–1 µs).

Can the SI5338B-B04135-GM generate different frequencies on each output simultaneously?

Yes, the SI5338B-B04135-GM uses four independent MultiSynth™ fractional-N synthesis engines - one per output - enabling simultaneous generation of four distinct frequencies (e.g., 100 MHz, 125 MHz, 156.25 MHz, 312.5 MHz) with no shared dividers or constraints. Each engine supports integer or fractional mode, 1 ppb resolution, and programmable phase offset (±45 ns).