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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338B-B04135-GMR

Name: SI5338B-B04135-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338B-B04135-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338B-B04135-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338B-B04135-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338B-B04135-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation from 1.8/2.5/3.3 V core supply in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338B-B04135-GMR datasheet, SI5338B-B04135-GMR pinout, SI5338B-B04135-GMR application, or SI5338B-B04135-GMR equivalent, key selection criteria include PCIe Gen 4 jitter compliance (0.15–0.45 ps RMS), independent output voltage per driver (1.5/1.8/2.5/3.3 V), MultiSynth™ fractional synthesis resolution (1 ppb), spread-spectrum control (0.5–5.0% spread, 33–63 kHz modulation), and loss-of-lock/loss-of-signal alarm support.

Technical Context

The SI5338B-B04135-GMR implements a two-stage PLL architecture: Stage 1 uses a high-frequency VCO (Fvco = 4.85–5.67 GHz) with programmable R-divider for input reference conditioning; Stage 2 employs four independent MultiSynth™ fractional-N synthesizers (M0–M3), each with programmable P-dividers and integer/fractional mode support, enabling true zero-ppm frequency accuracy on all outputs.

Each of the four output drivers supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats with independent VDDO supply (1.4–3.63 V), programmable phase offset (±45 ns, <20 ps step), and glitchless frequency increment/decrement (1 ppm steps). Input flexibility includes external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) references.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 4 common clock spec (0.15–0.45 ps RMS)
Output Count & Type	4 independent outputs; supports up to 4 differential (LVPECL/LVDS/HCSL/CML) or 8 single-ended (CMOS/SSTL/HSTL) clocks
Frequency Range	LVPECL/LVDS: 0.16–710 MHz; HCSL: 0.16–250 MHz; CMOS: 0.16–200 MHz; SSTL/HSTL: 0.16–350 MHz
Synthesis Resolution	1 ppb frequency step size; enables precise alignment to protocol-specific rates (e.g., 100 MHz PCIe, 156.25 MHz Ethernet)
Supply Voltages	Core: 1.8/2.5/3.3 V ±10%; Output buffers: 1.4–3.63 V per driver, enabling mixed-voltage system interfacing
Operating Temperature	–40 °C to +85 °C; qualified for industrial and telecom line card environments
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch; RoHS-compliant, moisture sensitivity level 3

Pinout & Package

SI5338B-B04135-GMR is housed in a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin 1 is top-left corner (IN1), pin 24 is bottom-right (GND). The package supports standard reflow profiles per JEDEC J-STD-020 and provides low thermal resistance (θJA = 37 °C/W).

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2	Differential input pair	Accepts 5–710 MHz AC-coupled differential reference; internal 100 Ω termination enabled
IN3, IN4	Single-ended input pair	Supports 5–200 MHz CMOS-level inputs; VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A, CLK0B – CLK3A, CLK3B	Differential output pairs	Four independent output drivers; each configurable as LVPECL/LVDS/HCSL/CML with dedicated VDDOx
VDDO0–VDDO3	Output buffer supplies	Independent 1.4–3.63 V supplies per output bank; enables mixed-signal voltage domain interfacing
VDD	Core supply	1.8/2.5/3.3 V ±10% core power; IDD = 45 mA typical at 100 MHz on all outputs
SCL, SDA	I²C/SMBus interface	Standard 100/400 kHz I²C bus; supports ClockBuilder Pro programming and runtime configuration
INTR	Interrupt output	Open-drain status indicator for loss-of-lock (LOL) and loss-of-signal (LOS) alarms

Key Features

Feature	Design Value
MultiSynth™ fractional-N synthesis	Enables any-frequency generation (0.16–710 MHz) on all four outputs with 1 ppb resolution and zero ppm error
PCIe Gen 1–4 & SRNS compliance	Meets PCIe Gen 4 common clock jitter spec (0.15–0.45 ps RMS) and Gen 3 Separate Reference No Spread requirements
Independent output voltage per driver	Each of four output banks powered by separate VDDOx (1.4–3.63 V), allowing direct interface to mixed-voltage FPGAs, processors, and SerDes
Programmable spread spectrum	Configurable on any output: 0.5–5.0% down-spread, 33–63 kHz modulation rate, reducing EMI in dense PCB layouts
Glitchless frequency adjustment	Hardware-supported frequency increment/decrement via PINC/FINC pins with 1 ppm step size and sub-ns update latency
Phase adjustment resolution	±45 ns range with <20 ps step accuracy per output, enabling fine-grained skew compensation across multi-lane interfaces

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch Clocking
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switch ASICs in a data center fabric module. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent, low-jitter PCIe-compliant clocks with matched phase alignment. Use Value: Enables deterministic link training and stable 16 GT/s operation across all lanes without external jitter cleaners or discrete oscillators.	Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs and packet processor interfaces in a carrier-grade Ethernet switch. IC Role / Device Role / Timing Role: Any-frequency clock synthesizer replacing multiple crystals while maintaining IEEE 802.3 jitter compliance. Use Value: Reduces BOM count by 4×, eliminates board-level frequency planning constraints, and supports dynamic rate adaptation via I²C.
Broadcast Video Sync	FPGA-Based Video Processing
Use Scenario: Delivering SMPTE ST 2082 (28.63636 MHz) and ST 292-1 (27 MHz) reference clocks to video encoder/decoder ICs in broadcast camera control units. IC Role / Device Role / Timing Role: Precision clock generator with zero-ppm synthesis accuracy and sub-20 ps phase step resolution. Use Value: Eliminates frame sync drift between HD/4K video streams and ensures seamless switching in live production environments.	Use Scenario: Supplying 100 MHz system clock, 200 MHz DDR4 memory clock, and 400 MHz transceiver reference to Xilinx Versal FPGA in real-time video analytics edge node. IC Role / Device Role / Timing Role: Configurable quad clock source supporting mixed-signal voltage domains (1.2 V FPGA core, 1.8 V DDR4, 2.5 V transceivers). Use Value: Single-chip solution eliminates inter-clock skew, simplifies power sequencing, and enables runtime clock rate changes during algorithm reconfiguration.

PCIe Gen 4 Switch Timing

Ethernet Switch Clocking

Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switch ASICs in a data center fabric module.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent, low-jitter PCIe-compliant clocks with matched phase alignment.

Use Value: Enables deterministic link training and stable 16 GT/s operation across all lanes without external jitter cleaners or discrete oscillators.

Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs and packet processor interfaces in a carrier-grade Ethernet switch.

IC Role / Device Role / Timing Role: Any-frequency clock synthesizer replacing multiple crystals while maintaining IEEE 802.3 jitter compliance.

Use Value: Reduces BOM count by 4×, eliminates board-level frequency planning constraints, and supports dynamic rate adaptation via I²C.

Broadcast Video Sync

FPGA-Based Video Processing

Use Scenario: Delivering SMPTE ST 2082 (28.63636 MHz) and ST 292-1 (27 MHz) reference clocks to video encoder/decoder ICs in broadcast camera control units.

IC Role / Device Role / Timing Role: Precision clock generator with zero-ppm synthesis accuracy and sub-20 ps phase step resolution.

Use Value: Eliminates frame sync drift between HD/4K video streams and ensures seamless switching in live production environments.

Use Scenario: Supplying 100 MHz system clock, 200 MHz DDR4 memory clock, and 400 MHz transceiver reference to Xilinx Versal FPGA in real-time video analytics edge node.

IC Role / Device Role / Timing Role: Configurable quad clock source supporting mixed-signal voltage domains (1.2 V FPGA core, 1.8 V DDR4, 2.5 V transceivers).

Use Value: Single-chip solution eliminates inter-clock skew, simplifies power sequencing, and enables runtime clock rate changes during algorithm reconfiguration.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D05189-GM	Higher integration: 8 outputs, integrated LDOs, lower jitter (0.35 ps RMS), supports JESD204B deterministic latency	Targeted at JESD204B ADC/DAC timing and multi-channel RF systems where deterministic delay matters	Select when >4 outputs, ultra-low jitter, or deterministic latency is required; not drop-in compatible due to different pinout and register map
ICS853S01AGI-01LFT	Fixed-frequency, non-programmable; 4 LVDS outputs; 0.9 ps RMS jitter; no I²C interface or spread spectrum	Cost-sensitive, static-clock applications like legacy PCIe Gen 2/3 add-in cards with fixed topology	Select only for fixed-frequency use cases where programmability, multi-format outputs, or PCIe Gen 4 compliance are unnecessary

Compared with Si5332A-D05189-GM and ICS853S01AGI-01LFT, SI5338B-B04135-GMR uniquely balances field-programmability, PCIe Gen 4 compliance, and quad-output flexibility in a compact QFN-making it optimal for mid-tier networking and video infrastructure where design reuse and future-proofing matter more than absolute lowest jitter or highest channel count.

Availability

SI5338B-B04135-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switch clocking, and broadcast video synchronization requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338B-B04135-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 family is designed as a programmable, low-jitter quad clock generator targeting high-speed serial interface timing-including PCIe, Ethernet, Fibre Channel, and broadcast video-where flexible frequency synthesis and robust jitter performance are critical.

FAQ

What is the maximum output frequency supported by SI5338B-B04135-GMR in LVPECL format?

The SI5338B-B04135-GMR supports LVPECL output frequencies up to 710 MHz. This capability is confirmed in Table 6 of the datasheet under "Output Clocks (Differential)" and enables direct clocking of high-speed SerDes blocks in PCIe Gen 4 and 100G Ethernet applications without external frequency multiplication.

Does SI5338B-B04135-GMR support PCIe Gen 4 Separate Reference No Spread (SRNS) mode?

Yes, SI5338B-B04135-GMR is explicitly compliant with PCIe Gen 3 SRNS and Gen 4 Common Clock specifications. Table 12 confirms RMS jitter of 0.11–0.32 ps (Gen 3 SRNS) and 0.15–0.45 ps (Gen 4), measured with PLL bandwidth of 2–4 MHz and CDR = 10 MHz per PCI-SIG requirements.

Can SI5338B-B04135-GMR generate four different output frequencies simultaneously?

Yes, SI5338B-B04135-GMR uses four independent MultiSynth™ engines (M0–M3) to synthesize four distinct frequencies simultaneously-each configurable from 0.16 MHz to 710 MHz depending on format-with true zero-ppm accuracy and no shared dividers limiting frequency combinations.

What input reference options does SI5338B-B04135-GMR support?

SI5338B-B04135-GMR accepts multiple reference types: external crystal (8–30 MHz), CMOS single-ended (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz). Pin assignments IN1/IN2, IN3/IN4, and IN5/IN6 provide dedicated paths for these sources, enabling flexible system-level clock tree design.

Is ClockBuilder Pro software required to configure SI5338B-B04135-GMR?

No-ClockBuilder Pro is optional but strongly recommended. SI5338B-B04135-GMR can be configured via standard I²C/SMBus commands using any microcontroller or host processor. ClockBuilder Pro simplifies register setup, validates configurations against jitter and compatibility rules, and generates initialization code for production firmware.

SI5338B-B04135-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338B-B04135-GMR FAQ

1.How can I place an order for SI5338B-B04135-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338B-B04135-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338B-B04135-GMR reliable?

The price and inventory of SI5338B-B04135-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338B-B04135-GMR is usually 5 days.

3.What payment methods are accepted for SI5338B-B04135-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338B-B04135-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338B-B04135-GMR?

SI5338B-B04135-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338B-B04135-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338B-B04135-GMR?

For technical support, including SI5338B-B04135-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338B-B04135-GMR requirements.

6.How does Aetrix verify that SI5338B-B04135-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338B-B04135-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338B-B04135-GMR meets industry standards.

7.What is the process for return or replacement of SI5338B-B04135-GMR?

All SI5338B-B04135-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338B-B04135-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338B-B04135-GMR part is unused and in its original packaging.

Return procedure for SI5338B-B04135-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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