Skyworks Solutions Inc. SI5338B-B04162-GM

Overview

SI5338B-B04162-GM from Skyworks Solutions is a quad-output, I²C-programmable clock generator implementing MultiSynth™ PLL architecture to synthesize independent frequencies up to 710 MHz on four differential outputs with 0 ppm frequency accuracy, 0.7 ps RMS phase jitter (typ), and PCIe Gen 1–4 Common Clock & Gen 3 SRNS compliance. It replaces multiple crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338B-B04162-GM datasheet, SI5338B-B04162-GM pinout, SI5338B-B04162-GM application, or SI5338B-B04162-GM equivalent, key selection criteria include differential output format support (LVPECL/LVDS/HCSL/SSTL), independent per-output voltage (1.5/1.8/2.5/3.3 V), 24-pin 4×4 mm QFN package, and I²C/SMBus programmability with ClockBuilder Pro software integration.

Technical Context

The SI5338B-B04162-GM integrates two synthesis stages: a primary PLL with 1.6 MHz loop bandwidth and a secondary MultiSynth™ fractional-N divider per output, enabling independent frequency, phase, and spread-spectrum control. Input flexibility includes external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) references.

Each of the four output drivers supports configurable signal formats (LVPECL, LVDS, HCSL, CML, CMOS, SSTL, HSTL), independent VDDO supply (1.4–3.63 V), and features such as glitchless ±1 ppm frequency increment/decrement, <20 ps phase step resolution, and programmable initial phase offset (±45 ns).

Key Specifications

Pinout & Package

SI5338B-B04162-GM uses a 24-pin QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Rev. 1.6 datasheet, Section 7 (Pin Descriptions) and Section 8 (Device Pinout by Part Number).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output programmable clock generator applications.

Compared with Si5332A-D06189-GM and ICS843002AGI-01LFT, the SI5338B-B04162-GM delivers optimal balance of field-programmability, PCIe Gen 4 compliance, and design flexibility-enabling single-device replacement of multiple oscillators while supporting phase alignment and spread-spectrum control critical for EMI reduction.

Availability

SI5338B-B04162-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 root complexes, Ethernet switching platforms, broadcast video synchronizers, and FPGA-based embedded systems requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5338B-B04162-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 family is designed as a highly configurable, low-jitter clock generator platform for replacing multiple discrete oscillators in high-speed serial interface timing-targeting PCIe, Ethernet, telecom, and broadcast infrastructure applications.

FAQ

What is the maximum differential input frequency supported by the SI5338B-B04162-GM?

The SI5338B-B04162-GM supports differential input frequencies up to 710 MHz on pins IN1/IN2 and IN5/IN6, compliant with AC-coupled LVPECL/LVDS/CML standards and requiring external 100 Ω termination per differential pair. This enables direct use of high-speed SerDes reference clocks without external dividers.

Does the SI5338B-B04162-GM support PCIe Gen 4 Common Clock compliance?

Yes, the SI5338B-B04162-GM meets PCIe Gen 4 Common Clock jitter specifications with 0.15–0.45 ps RMS (10 kHz–50 MHz) when configured per Skyworks AN562 guidelines, using HCSL 100 MHz outputs and validated with the Skyworks PCIe Clock Jitter Tool. Its PLL bandwidth and MultiSynth™ architecture ensure robustness against reference noise.

Can the SI5338B-B04162-GM generate both LVDS and CMOS outputs simultaneously?

Yes, the SI5338B-B04162-GM supports mixed-signal operation: any combination of LVDS, LVPECL, HCSL, CMOS, SSTL, or HSTL on its four output pairs, with independent VDDO supplies (1.4–3.63 V) per driver group. For example, CLK0A/B can be LVDS at 1.8 V while CLK2A/B operates as 3.3 V CMOS-no external level shifters required.

What is the phase adjustment resolution available on each output of the SI5338B-B04162-GM?

The SI5338B-B04162-GM provides <20 ps phase step resolution per output, with a total programmable range of ±45 ns. This enables precise inter-output skew calibration-critical for DDR memory timing, multi-lane SerDes alignment, and broadcast video frame synchronization-using either I²C commands or dedicated PINC/FINC control pins.

Is an external crystal required for SI5338B-B04162-GM operation?

No, the SI5338B-B04162-GM accepts multiple reference sources: an 8–30 MHz crystal directly on IN1/IN2, or external CMOS/SSTL/HSTL/differential clocks from 5 MHz to 710 MHz. Crystal operation requires no external load capacitors due to on-chip 12 pF tuning; however, optimal stability is achieved with 18 pF recommended external CL.