Skyworks Solutions Inc. SI5338B-B04872-GM

Overview

SI5338B-B04872-GM from Skyworks Solutions is a quad-output, I²C-programmable clock generator with MultiSynth™ frequency synthesis, delivering four independent differential or single-ended clocks (up to 710 MHz LVPECL/LVDS, 350 MHz SSTL/HSTL) with 0.7 ps RMS typical phase jitter and PCIe Gen 1–4 Common Clock & Gen 3 SRNS compliance. It replaces multiple crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338B-B04872-GM datasheet, SI5338B-B04872-GM pinout, SI5338B-B04872-GM application, or SI5338B-B04872-GM equivalent, key selection criteria include its 24-QFN package, I²C/SMBus programmability, independent output voltage per driver (1.5/1.8/2.5/3.3 V), spread-spectrum capability (0.5–5.0% down-spread), and support for external crystal (8–30 MHz) or differential input (5–710 MHz).

Technical Context

The SI5338B-B04872-GM implements a two-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesizers, each feeding a configurable output driver. This enables true zero-ppm frequency accuracy across all outputs without requiring external loop filters.

Its functional block includes dedicated input multiplexing for six clock sources (IN1–IN6), on-chip OTP NVM for configuration storage, loss-of-lock and loss-of-signal alarms, and pin-controlled frequency/phase increment/decrement with <20 ps step resolution and glitchless 1 ppm frequency adjustment.

Key Specifications

Pinout & Package

SI5338B-B04872-GM uses a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad (GND-connected). Pin assignments are fixed per Skyworks Si5338 family specification.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output clock generator applications.

Compared with Si5338A-B04872-GM, the SI5338B-B04872-GM offers identical hardware but distinct factory OTP settings-requiring no PCB change but possible firmware reconfiguration. Against LMK04832RHAT, it trades JESD204B features for lower power, finer per-output control, and broader protocol coverage (PCIe/Ethernet/broadcast).

Availability

SI5338B-B04872-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, 10GbE switch clocking, broadcast video synchronization, and FPGA reference clocking requiring stable component supply and long-term lifecycle support.

Supply support for SI5338B-B04872-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 product line delivers highly configurable, low-jitter clock generation for multi-protocol serial interfaces-including PCIe, Ethernet, Fibre Channel, and broadcast video-enabling consolidation of discrete timing components into a single programmable IC.

FAQ

What is the primary function of the SI5338B-B04872-GM in a timing architecture?

The SI5338B-B04872-GM serves as a quad-output, any-frequency clock generator that synthesizes up to four independent, low-jitter clock signals from a single reference (crystal or external clock). Its MultiSynth™ technology enables zero-ppm frequency accuracy and supports protocols including PCIe Gen 4, 10GbE, and SMPTE video standards. The SI5338B-B04872-GM replaces multiple discrete oscillators while providing per-output format, voltage, and spread-spectrum control.

Does the SI5338B-B04872-GM support PCIe Gen 4 Common Clock compliance?

Yes, the SI5338B-B04872-GM meets PCIe Gen 4 Common Clock jitter requirements with ≤0.45 ps RMS (12 kHz–20 MHz) when configured per Skyworks' recommended settings (e.g., HCSL outputs, 100 MHz, PLL bandwidth 2–5 MHz). It is also compliant with PCIe Gen 1/2/3 Common Clock and Gen 3 SRNS specifications, verified using the Skyworks PCIe Clock Jitter Tool and Intel Clock Jitter Tool v1.6.4.

How many independent output supply voltages does the SI5338B-B04872-GM support?

The SI5338B-B04872-GM supports four independent output buffer supply rails (VDDO0–VDDO3), each configurable for 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This allows direct interfacing with mixed-voltage devices-such as FPGAs with multiple I/O banks-without external level shifters. Each rail powers one pair of differential outputs (CLK0A/B through CLK3A/B), enabling per-output logic-level optimization.

Can the SI5338B-B04872-GM operate in clock buffer (PLL bypass) mode?

Yes, the SI5338B-B04872-GM supports clock buffer mode, where the input clock passes directly to selected outputs with minimal additive jitter (0.165 ps RMS typical, 12 kHz–20 MHz). In this mode, the PLL is disabled, reducing power consumption and enabling deterministic latency. Valid inputs include differential (5–710 MHz) and single-ended (5–200 MHz) sources, with loss-of-signal detection still active.

What programming interface does the SI5338B-B04872-GM use, and is external memory required?

The SI5338B-B04872-GM uses an I²C/SMBus-compatible 2-wire serial interface (SCL/SDA pins) for configuration. It contains on-chip one-time-programmable (OTP) non-volatile memory that stores the default configuration, eliminating the need for external EEPROM or flash. Configuration can be updated dynamically via I²C or pre-programmed using Skyworks' ClockBuilder Pro software before deployment.