Skyworks Solutions Inc. SI5338B-B05723-GM

Overview

SI5338B-B05723-GM from Skyworks Solutions is a quad-output, I²C-programmable clock generator with MultiSynth™ frequency synthesis. It delivers four independent, any-frequency outputs (0.16–710 MHz), supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats, achieves 0.7 ps RMS phase jitter, and operates from 1.8/2.5/3.3 V core supply in PCIe Gen 4–compliant timing systems for FPGA and processor clocking.

For engineers reviewing the SI5338B-B05723-GM datasheet, SI5338B-B05723-GM pinout, SI5338B-B05723-GM application, or SI5338B-B05723-GM equivalent, key selection criteria include PCIe Gen 4 SRNS compliance, independent per-output voltage control (1.5–3.3 V), 20 ps phase step resolution, spread-spectrum capability (0.5–5.0% at 33–63 kHz), and 4×4 mm 24-QFN package integration.

Technical Context

The SI5338B-B05723-GM implements a two-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesizers. Each output path includes programmable divider chains (R/M/N/P), configurable output drivers, and dedicated voltage rails (VDDO0–VDDO3) enabling mixed-signal format generation on a single die.

It supports flexible reference inputs - including 8–30 MHz crystals, 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL, and 5–710 MHz differential - with loss-of-signal detection (<5 µs) and loss-of-lock reporting. Independent frequency increment/decrement (1 ppm steps) and phase adjustment (<20 ps steps) are implemented via pin control or I²C interface.

Key Specifications

Pinout & Package

SI5338B-B05723-GM uses a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed per Skyworks Si5338 family specification.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output clock generator applications.

Compared with Si5338A-B05723-GM, the SI5338B-B05723-GM offers identical hardware functionality but distinct factory-programmed settings; versus LMK04832RHAT, it provides superior integration density and lower power for multi-frequency generation, though with less aggressive jitter cleaning capability.

Availability

SI5338B-B05723-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 timing systems, FPGA clock trees, and Ethernet switch/router designs requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for SI5338B-B05723-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 product line was designed for high-density, low-jitter clock generation in datacenter, telecom, and broadcast equipment where space-constrained PCBs demand replacement of multiple discrete oscillators with a single programmable IC.

FAQ

What is the primary function of the SI5338B-B05723-GM in a timing architecture?

The SI5338B-B05723-GM serves as a quad-output, any-frequency clock generator that replaces up to four discrete oscillators. It synthesizes independent, low-jitter clocks (0.16–710 MHz) using MultiSynth™ technology, supports PCIe Gen 4 SRNS compliance, and enables flexible system-level clock tree design without external crystals or fanout buffers. Its I²C programmability allows field updates and rapid prototyping.

Does the SI5338B-B05723-GM support spread-spectrum clocking (SSC), and how is it configured?

Yes, the SI5338B-B05723-GM supports programmable spread-spectrum clocking on any output, with adjustable spread (0.5–5.0%), modulation rate (33–63 kHz), and direction (down-spread default). Configuration is performed via I²C registers or ClockBuilder Pro software; no external components are required. SSC reduces electromagnetic interference in high-speed digital systems such as PCIe and Ethernet switch PCBs.

What input reference sources are compatible with the SI5338B-B05723-GM?

The SI5338B-B05723-GM accepts multiple reference types: 8–30 MHz fundamental-mode crystals (with on-chip load capacitance tuning), 5–200 MHz CMOS single-ended inputs, 5–350 MHz SSTL/HSTL inputs, and 5–710 MHz differential inputs (LVDS/LVPECL/CML). All inputs support loss-of-signal detection with 2.6–5 µs response time, enabling robust failover in mission-critical timing systems.

How does the SI5338B-B05723-GM achieve 0.7 ps RMS phase jitter performance?

The SI5338B-B05723-GM achieves 0.7 ps RMS phase jitter (12 kHz–20 MHz) through optimized PLL loop design, low-noise VCO architecture, and MultiSynth™ fractional-N synthesis with high-resolution dividers. Jitter performance is validated under differential output conditions (LVDS/HCSL) with low-noise differential reference inputs and meets PCIe Gen 3/4 common clock specifications per Intel Clock Jitter Tool v1.6.4 measurements.

Can the SI5338B-B05723-GM generate different output voltage levels simultaneously on its four clock outputs?

Yes, the SI5338B-B05723-GM supports independent output voltage control per bank: VDDO0 powers CLK0A/B, VDDO1 powers CLK1A/B, etc. Each VDDO rail accepts 1.5/1.8/2.5/3.3 V, allowing simultaneous LVDS (2.5 V), HCSL (1.8 V), and CMOS (3.3 V) outputs without external level shifters - critical for interfacing with heterogeneous SoCs, FPGAs, and ASICs in modern compute platforms.