Skyworks Solutions Inc. SI5338B-B06189-GM

Overview

SI5338B-B06189-GM from Skyworks Solutions is an I²C-programmable quad clock generator IC with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C. It replaces up to four crystal oscillators in Ethernet switch/router, processor/FPGA clocking, and 1/10 GbE timing systems.

For engineers reviewing the SI5338B-B06189-GM datasheet, SI5338B-B06189-GM pinout, SI5338B-B06189-GM application, or SI5338B-B06189-GM equivalent, key selection considerations include its MultiSynth™-based any-frequency synthesis (0.16–710 MHz per output), independent output voltage support (1.5/1.8/2.5/3.3 V), flexible reference inputs (crystal, CMOS, SSTL/HSTL, differential), and I²C/SMBus programmability with ClockBuilder Pro software integration.

Technical Context

The SI5338B-B06189-GM implements a two-stage PLL architecture: a high-stability input stage with programmable R-divider and a fractional-N MultiSynth™ synthesis stage per output, enabling independent frequency, phase, and spread-spectrum control. Its core operates from a single 1.8/2.5/3.3 V supply with 45 mA typical current draw.

Each of the four output drivers supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats with independent VDDO supplies, programmable initial phase offset (±45 ns), and glitchless frequency increment/decrement in 1 ppm steps. Input references range from 5–710 MHz depending on interface type, and loss-of-lock/loss-of-signal alarms are integrated.

Key Specifications

Pinout & Package

SI5338B-B06189-GM is housed in a 24-lead, 4 × 4 mm QFN package with exposed thermal pad. Pin assignments follow Skyworks' standard Si5338 pinout: dual differential inputs (IN1/IN2, IN5/IN6), two single-ended inputs (IN3, IN4), four differential output pairs (CLK0A/B through CLK3A/B), three independent VDDO supplies (VDDO0–VDDO3), shared VDD and GND, I²C interface (SCL/SDA), interrupt (INTR), and reserved ground (RSVD_GND).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Compared with Si5332A-D06189-GM, SI5338B-B06189-GM offers broader input reference support and simpler configuration for mid-tier applications, while ICS8430I-01T lacks programmability entirely-making SI5338B-B06189-GM the optimal balance of flexibility, jitter performance, and ease of use for PCIe and multi-gigabit Ethernet platforms.

Availability

SI5338B-B06189-GM is available at Aetrix Electronics and suitable for Ethernet switch/router, PCIe Gen 1–4 endpoint clocking, and broadcast video timing applications requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5338B-B06189-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog semiconductors, specializing in RF, timing, and precision analog solutions for communications, automotive, and industrial markets.

The Si5338 family was designed as a programmable, low-jitter clock generator platform for high-speed digital systems requiring flexible, multi-output timing with minimal board area - targeting networking, datacenter, and broadcast infrastructure.

FAQ

What is the maximum output frequency supported by SI5338B-B06189-GM?

The SI5338B-B06189-GM supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, and 250 MHz on HCSL. Frequencies above 350 MHz are limited to two unique values simultaneously (Fvco/4 and Fvco/6), as confirmed in Table 6 of the datasheet. This capability enables direct generation of PCIe Gen 4 reference clocks and Fibre Channel rates without external dividers.

Does SI5338B-B06189-GM support PCIe Gen 4 Common Clock compliance?

Yes, SI5338B-B06189-GM meets PCIe Gen 4 Common Clock RMS jitter specification of ≤0.45 ps (10 kHz–50 MHz) per Table 12. It achieves this with its MultiSynth™ architecture and low-noise PLL design, validated using the Skyworks PCIe Clock Jitter Tool and Intel Clock Jitter Tool v1.6.4 under specified test conditions.

Can SI5338B-B06189-GM generate different output voltages on each channel?

Yes, SI5338B-B06189-GM provides independent VDDOx supplies (VDDO0–VDDO3) for each output driver pair, supporting 1.5 V, 1.8 V, 2.5 V, or 3.3 V per channel. This allows CLK0A/B to drive 1.8 V FPGA I/O banks while CLK2A/B clocks 3.3 V Ethernet PHYs - verified in Table 1 and functional block diagram.

Is an external crystal required for SI5338B-B06189-GM operation?

No - SI5338B-B06189-GM accepts multiple reference sources: external crystals (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential inputs (5–710 MHz). Crystal usage is optional; the device can operate from any supported clock source without modification to the SI5338B-B06189-GM itself.

How is SI5338B-B06189-GM programmed in-system?

SI5338B-B06189-GM is programmed via its I²C/SMBus-compatible serial interface (SCL/SDA pins), supporting standard- and fast-mode speeds. Configuration is performed using Skyworks' ClockBuilder Pro software, which generates register maps and validates settings against jitter and timing constraints before download to the device's OTP NVM.