Skyworks Solutions Inc. SI5338B-B09440-GM

Overview

SI5338B-B09440-GM from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C. It replaces up to four crystal oscillators in high-speed serial interface timing applications such as PCIe root complexes and FPGA-based compute platforms.

For engineers reviewing the SI5338B-B09440-GM datasheet, SI5338B-B09440-GM pinout, SI5338B-B09440-GM application, or SI5338B-B09440-GM equivalent, key selection criteria include its MultiSynth™-based any-frequency synthesis (0.16–710 MHz per output), independent output voltage control (1.5/1.8/2.5/3.3 V), spread-spectrum capability (0.5–5.0% down-spread), and 24-pin 4×4 mm QFN package with I²C/SMBus configuration interface.

Technical Context

The SI5338B-B09440-GM implements a two-stage PLL architecture: a high-stability integer-N PLL (Stage 1) locks to one of six input references (crystal, CMOS, SSTL/HSTL, or differential), followed by four independent MultiSynth™ fractional-N synthesis blocks (Stage 2) generating each output. Each MultiSynth supports programmable phase offset (<20 ps step), frequency increment/decrement (1 ppm step), and spread-spectrum modulation (33–63 kHz rate).

Input flexibility includes external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz); outputs support LVPECL/LVDS (0.16–710 MHz), HCSL (0.16–250 MHz), CMOS (0.16–200 MHz), and SSTL/HSTL (0.16–350 MHz), with independent VDDO per driver and loss-of-lock/loss-of-signal alarms.

Key Specifications

Pinout & Package

SI5338B-B09440-GM uses a 24-pin, 4 × 4 mm QFN package with exposed thermal pad. Pin functions are defined per Skyworks Rev. 1.6 datasheet (pages 33–37).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Compared with Si5332A-D08480-GM and ICS853S01AG-01LF, the SI5338B-B09440-GM uniquely balances field-programmability, PCIe Gen 4 compliance, and compact 24-QFN packaging-making it optimal for space-constrained, multi-protocol systems requiring post-silicon clock tuning without redesign.

Availability

SI5338B-B09440-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 server motherboards, 10 GbE switch fabric timing, and broadcast video processing equipment requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338B-B09440-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs for infrastructure, automotive, and mobile markets.

The Si5338 family is designed as a programmable, low-jitter clock generator platform for high-speed serial interface timing-including PCIe, Ethernet, Fibre Channel, and telecom synchronization-where flexibility, precision, and small footprint are critical.

FAQ

What is the maximum output frequency supported by the SI5338B-B09440-GM?

The SI5338B-B09440-GM supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, 250 MHz on HCSL, and 200 MHz on CMOS. Frequencies above 350 MHz are limited to two unique values simultaneously (Fvco/4 and Fvco/6), as specified in the Synthesis Stages section of the datasheet.

Does the SI5338B-B09440-GM support PCIe Gen 4 Common Clock compliance?

Yes, the SI5338B-B09440-GM meets PCIe Gen 4 Common Clock RMS jitter requirements (< 0.45 ps, 10 kHz–50 MHz) when configured with a 2–5 MHz PLL bandwidth and appropriate input reference. This is verified per PCI Express Base Specification 4.0 rev. 0.5 and measured using the Skyworks PCIe Clock Jitter Tool.

Can the SI5338B-B09440-GM generate different output voltages simultaneously?

Yes, the SI5338B-B09440-GM provides four independent VDDO pins (VDDO0–VDDO3), allowing each of its four output drivers to operate at 1.5 V, 1.8 V, 2.5 V, or 3.3 V concurrently-enabling mixed-voltage clock distribution to diverse downstream logic families without level shifters.

How is the SI5338B-B09440-GM programmed in-system?

The SI5338B-B09440-GM is programmed via its I²C/SMBus-compatible interface (SCL/SDA pins) using Skyworks' ClockBuilder Pro software. Configuration can be performed during manufacturing or dynamically in the field, supporting runtime frequency, phase, and spread-spectrum adjustments without device reset.

What input reference options does the SI5338B-B09440-GM support?

The SI5338B-B09440-GM accepts six input reference types: 8–30 MHz crystal (differential), 5–200 MHz CMOS (IN3/IN4), 5–350 MHz SSTL/HSTL, or 5–710 MHz differential (IN1/IN2, IN5/IN6). Input selection is configurable via internal registers and supports automatic failover between references.