Skyworks Solutions Inc. SI5338B-B11486-GM
- Part No.:
- SI5338B-B11486-GM
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Application Specific Clock/Timing
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
SI5338B-B11486-GM.pdf
- Description:
- I2C CONTROL, 4-OUTPUT, ANY FREQU
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI5338B-B11486-GM from Skyworks Solutions is a quad-output, I²C-programmable clock generator with MultiSynth™ frequency synthesis. It delivers four independent differential or single-ended clocks (up to 710 MHz LVPECL/LVDS, 350 MHz SSTL/HSTL), 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation from 1.8/2.5/3.3 V core supply in a 4 × 4 mm 24-QFN package - used for FPGA/processor clocking and high-speed serial interface timing.
For engineers reviewing the SI5338B-B11486-GM datasheet, SI5338B-B11486-GM pinout, SI5338B-B11486-GM application, or SI5338B-B11486-GM equivalent, key selection criteria include output format flexibility per channel (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL), independent voltage per output driver (1.5–3.3 V), ±20 ps phase step resolution, and spread-spectrum control (0.5–5.0% deviation, 33–63 kHz modulation).
Technical Context
The SI5338B-B11486-GM integrates a dual-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesizers. Each output path includes configurable dividers (R/M/P), programmable initial phase offset (±45 ns), and glitchless frequency increment/decrement via dedicated pins or I²C.
It supports multiple input references - external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) - and enables zero-delay mode via external feedback. Loss-of-lock and loss-of-signal alarms provide real-time status monitoring.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Phase Jitter (RMS) | 0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3 SRNS and GbE jitter requirements |
| Output Frequency Range | 0.16–710 MHz depending on format: LVPECL/LVDS up to 710 MHz, HCSL up to 250 MHz, CMOS up to 200 MHz |
| Input Reference Support | Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz) |
| Output Driver Flexibility | Four differential outputs (CLK0A/B–CLK3A/B), eight single-ended options, or mixed configuration; each with independent VDDO (1.5/1.8/2.5/3.3 V) |
| Core Supply Voltage | 1.8 V (±5%), 2.5 V (±10%), or 3.3 V (±10%) - single-supply operation with high PSRR |
| Spread Spectrum | Configurable per output: 0.5–5.0% deviation, 33–63 kHz modulation rate, any frequency 5–350 MHz |
| Operating Temperature | –40 °C to +85 °C ambient; qualified for industrial embedded and telecom line card applications |
Pinout & Package
SI5338B-B11486-GM is housed in a 4 × 4 mm, 24-lead QFN package with exposed thermal pad. Pin assignments are fixed per the Si5338 family: IN1/IN2 (differential ref 1), IN3/IN4 (single-ended ref), IN5/IN6 (differential ref 2), CLK0A/CLK0B through CLK3A/CLK3B (four differential output pairs), VDDO0–VDDO3 (independent output supply pins), VDD (core supply), SCL/SDA (I²C interface), INTR (interrupt output), and RSVD_GND (reserved ground).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CLK0A / CLK0B | Differential Output Pair 0 | LVPECL/LVDS/HCSL/CML-capable; independently configured frequency, format, and VDDO0 voltage |
| CLK1A / CLK1B | Differential Output Pair 1 | Same configurability as CLK0; supports integer/fractional synthesis and ±45 ns phase offset |
| CLK2A / CLK2B | Differential Output Pair 2 | Independent MultiSynth™ channel; supports spread spectrum and glitchless frequency adjustment |
| CLK3A / CLK3B | Differential Output Pair 3 | Final output channel; compatible with PCIe Gen 4 common clock and SRNS timing requirements |
| IN1 / IN2 | Differential Input 1 | Accepts 5–710 MHz differential reference; internal 100 Ω termination support |
| IN3 / IN4 | Single-Ended Input | CMOS/SSTL/HSTL-compatible; 5–350 MHz range; 2.0 pF input capacitance |
| SCL / SDA | I²C Interface | Standard SMBus-compatible serial interface (up to 400 kHz); used for full device configuration |
| INTR | Interrupt Output | Open-drain status indicator for loss-of-lock and loss-of-signal events |
| VDDO0–VDDO3 | Output Buffer Supplies | Independent 1.5/1.8/2.5/3.3 V supplies per output bank; enables mixed-voltage system interfacing |
| VDD | Core Supply | Single 1.8/2.5/3.3 V supply for PLL, logic, and memory; 45 mA typical current at 100 MHz outputs |
Key Features
| Feature | Design Value |
|---|---|
| MultiSynth™ Synthesis | Four independent fractional-N synthesizers enable true zero-ppm accuracy on all outputs without external crystals |
| PCIe Gen 1–4 Compliance | Meets Common Clock and Gen 3 SRNS jitter specs (0.11–0.45 ps RMS); validated using Intel Clock Jitter Tool |
| Glitchless Frequency Adjustment | Pin-controlled or I²C-based frequency increment/decrement in 1 ppm steps, update time ≤667 ns |
| Programmable Phase Offset | ±45 ns range with <20 ps step resolution per output - critical for skew-sensitive SerDes alignment |
| Flexible Input Architecture | Supports six reference inputs (two differential pairs + two single-ended) enabling multi-source redundancy or frequency translation |
| Low-Power Operation | 45 mA typical core current at full load; optimized for space-constrained industrial and telecom modules |
Applications
| Processor and FPGA Clocking | PCIe Gen 1–4 Timing |
|---|---|
Use Scenario: Providing synchronized, low-jitter clocks to multi-core processors and high-density FPGAs in baseband units and AI accelerators. IC Role / Device Role / Timing Role: Quad-output clock generator delivering independent frequencies (e.g., 100 MHz CPU, 200 MHz DDR, 300 MHz PCIe, 500 MHz SerDes) with sub-1 ps jitter. Use Value: Eliminates need for four discrete oscillators; reduces BOM count and board area while maintaining timing margin for >1 GHz transceivers. | Use Scenario: Generating compliant reference clocks for PCIe root complexes and endpoints across Gen 1–4 implementations. IC Role / Device Role / Timing Role: Common Clock source meeting PCIe Gen 4 jitter spec (0.15–0.45 ps RMS) and SRNS requirements for Gen 3. Use Value: Enables single-device timing solution for multi-lane PCIe slots; supports spread-spectrum for EMI reduction without violating jitter limits. |
| Ethernet Switch/Routing | Broadcast Video/Audio Timing |
Use Scenario: Delivering precise, low-phase-noise clocks to 1/10 GbE PHYs, packet buffers, and traffic managers in enterprise switches. IC Role / Device Role / Timing Role: Configurable buffer and level translator supporting 125 MHz GbE, 156.25 MHz 10GbE, and 312.5 MHz PAM4 interfaces. Use Value: Single-chip replacement for multiple crystal oscillators and fanout buffers; simplifies layout and improves signal integrity via matched trace lengths. | Use Scenario: Synchronizing frame rates, pixel clocks, and audio sample rates across SDI, HDMI, and AES67 domains in broadcast infrastructure. IC Role / Device Role / Timing Role: Any-frequency synthesizer generating exact multiples of 27 MHz (SDI), 29.5 MHz (HD), and 48 kHz (audio) with <10 ps cycle-cycle jitter. Use Value: Enables seamless format conversion and lip-sync accuracy; eliminates manual crystal selection and custom PLL design. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad-output clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5338A-B11486-GM | Same pinout and register map; differs only in factory-programmed NVM configuration - A-grade uses different default startup settings than B-grade | Identical use cases; A-grade targets general-purpose designs, B-grade optimized for PCIe and low-jitter applications | Select SI5338B-B11486-GM when PCIe Gen 3/4 compliance, SRNS mode, or guaranteed low-jitter startup behavior is required. |
| LMK04832ISQE/NOPB | Two PLLs (vs. one reference + four MultiSynth™), higher power (120 mA), larger 7 × 7 mm package; supports JESD204B deterministic latency | Better suited for RF sampling and JESD204B systems; lacks per-output spread spectrum and independent VDDO per bank | Choose LMK04832ISQE/NOPB only if deterministic latency, dual-loop redundancy, or JESD204B SYSREF generation is mandatory. |
Compared with Si5338A-B11486-GM and LMK04832ISQE/NOPB, SI5338B-B11486-GM provides superior integration density (4×4 mm), lower jitter (0.7 ps RMS), and finer-grained output control (per-pin VDDO, phase step <20 ps), making it optimal for space-constrained, multi-protocol timing applications where PCIe and SerDes jitter budgets are tight.
Availability
SI5338B-B11486-GM is available at Aetrix Electronics and suitable for processor/FPGA clocking, PCIe Gen 1–4 timing, and broadcast video/audio synchronization requiring stable component supply, long-term lifecycle support, and consistent electrical performance across temperature.
Supply support for SI5338B-B11486-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.
The Si5338 product line was designed as a highly flexible, software-programmable clock generator family targeting high-speed serial interface timing - specifically addressing PCIe, Ethernet, Fibre Channel, and broadcast video applications requiring multi-output, low-jitter, and field-reprogrammable capability.
FAQ
What is the primary function of the SI5338B-B11486-GM in a timing architecture?
The SI5338B-B11486-GM serves as a quad-output, I²C-programmable clock generator that replaces up to four discrete oscillators. It synthesizes any frequency on each of its four outputs using MultiSynth™ technology, delivering 0.7 ps RMS typical phase jitter and PCIe Gen 1–4 compliance. Its role is to provide precise, independent, low-jitter clocks to processors, FPGAs, SerDes lanes, and high-speed interfaces - all from a single 4 × 4 mm QFN package.
Does the SI5338B-B11486-GM support spread-spectrum clocking, and how is it configured?
Yes, the SI5338B-B11486-GM supports per-output spread-spectrum clocking (SSC) with user-selectable parameters: frequency range (5–350 MHz), spread magnitude (0.5–5.0%), and modulation rate (33–63 kHz). SSC is configured via I²C registers or ClockBuilder Pro software - no external components required. The feature is enabled independently on any output and maintains jitter compliance for PCIe and EMI-sensitive applications.
Can the SI5338B-B11486-GM operate without an external crystal?
Yes, the SI5338B-B11486-GM can operate without an external crystal by accepting alternative reference inputs: CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) signals on dedicated input pins. An external crystal (8–30 MHz) is optional and used only when highest stability or lowest phase noise is required. The device's internal oscillator circuitry supports all modes without hardware change.
How does the SI5338B-B11486-GM handle phase alignment between its four outputs?
The SI5338B-B11486-GM provides independent programmable phase offset on each output with ±45 ns range and <20 ps step resolution. Phase alignment is achieved via register writes over I²C or pin-controlled adjustments. Skew between outputs is minimized by shared MultiSynth™ synthesis stages and matched internal routing - measured at ≤100 ps pk-pk under identical conditions.
Is the SI5338B-B11486-GM pin-compatible with other Si5338 variants like the Si5338A or Si5338C?
Yes, all Si5338 variants - including SI5338B-B11486-GM, Si5338A-B11486-GM, and Si5338C-B11486-GM - share identical 24-QFN package, pinout, register map, and electrical interface. Differences lie solely in factory-programmed NVM content (startup configuration, default PLL settings, and jitter optimization profiles), not hardware or pin assignment.
SI5338B-B11486-GM Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- MultiSynth™
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- PLL:
- Yes with Bypass
- Main Purpose:
- Ethernet, Fibre Channel, PCI Express (PCIe), Telecom
- Input:
- CML, CMOS, HCSL, HSCT, HSTL, LVDS, LVPECL, SSTL, Crystal
- Output:
- CML, HCSL, HSTL, LVCMOS, LVDS, LVPECL, SSTL
- Number of Circuits:
- 1
- Ratio - Input:Output:
- 3:4
- Differential - Input:Output:
- Yes/Yes
- Frequency - Max:
- 350MHz
- Voltage - Supply:
- 1.71V ~ 1.98V, 2.25V ~ 2.75V, 2.97V ~ 3.63V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 24-QFN (4x4)
SI5338B-B11486-GM FAQ
1.How can I place an order for SI5338B-B11486-GM through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5338B-B11486-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5338B-B11486-GM reliable?
The price and inventory of SI5338B-B11486-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338B-B11486-GM is usually 5 days.
3.What payment methods are accepted for SI5338B-B11486-GM?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338B-B11486-GM transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5338B-B11486-GM?
SI5338B-B11486-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5338B-B11486-GM order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5338B-B11486-GM?
For technical support, including SI5338B-B11486-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338B-B11486-GM requirements.
6.How does Aetrix verify that SI5338B-B11486-GM is sourced from the original manufacturer or authorized distributors?
All SI5338B-B11486-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338B-B11486-GM meets industry standards.
7.What is the process for return or replacement of SI5338B-B11486-GM?
All SI5338B-B11486-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338B-B11486-GM, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5338B-B11486-GM part is unused and in its original packaging.
Return procedure for SI5338B-B11486-GM:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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