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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338C-B03798-GMR

Name: SI5338C-B03798-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338C-B03798-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338C-B03798-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338C-B03798-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

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Product details

Overview

SI5338C-B03798-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation from 1.8/2.5/3.3 V core supply in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338C-B03798-GMR datasheet, SI5338C-B03798-GMR pinout, SI5338C-B03798-GMR application, or SI5338C-B03798-GMR equivalent, key selection considerations include its MultiSynth™-based any-frequency synthesis (0.16–710 MHz per output), independent output voltage per driver (1.5–3.3 V), programmable phase/frequency increment (±45 ns / 20 ps step), and spread-spectrum capability (0.5–5.0% spread, 33–63 kHz modulation).

Technical Context

The SI5338C-B03798-GMR implements a two-stage PLL architecture: a high-stability reference stage (input frequency range 5–710 MHz) followed by four independent MultiSynth™ fractional-N synthesis blocks, each driving a configurable output buffer. Its synthesis resolution is 1 ppb, enabling true zero-ppm accuracy on all outputs.

It supports flexible input references - external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) - and offers independent output format selection per channel: LVPECL/LVDS (0.16–710 MHz), HCSL (0.16–250 MHz), CMOS (0.16–200 MHz), or SSTL/HSTL (0.16–350 MHz).

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3 SRNS and Gen 4 common clock jitter requirements.
Output Frequency Range	0.16–710 MHz per channel; supports integer/fractional synthesis with 1 ppb resolution.
Input Reference Support	Differential (5–710 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or 8–30 MHz crystal.
Output Driver Flexibility	Four differential outputs (CLK0A/B–CLK3A/B), eight single-ended options, or mixed configuration.
Supply Voltages	Core: 1.8/2.5/3.3 V ±10%; output buffers: independently configurable 1.4–3.63 V per VDDOx rail.
Operating Temperature	–40 °C to +85 °C; qualified for industrial and telecom line card environments.
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch; RoHS-compliant, GMR suffix indicates green/reduced-halogen.

Pinout & Package

SI5338C-B03798-GMR is housed in a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed across Si5338 family variants; this part uses standard Si5338 pinout.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2	Differential Input 1	Accepts 5–710 MHz AC-coupled differential reference; internal 100 Ω termination enabled.
IN3, IN4	Single-Ended Input	Supports 5–200 MHz CMOS-level clock; VIH = 0.7×VDD, VIL = 0.3×VDD.
CLK0A, CLK0B – CLK3A, CLK3B	Differential Output Pairs	Four independent LVPECL/LVDS/HCSL/CML outputs; each pair shares one VDDOx supply rail.
VDDO0–VDDO3	Output Buffer Supplies	Independent 1.4–3.63 V rails per output group; enables mixed-voltage signaling (e.g., 1.8 V LVDS + 3.3 V CMOS).
SCL, SDA	I²C Interface	SMBus-compatible 100/400 kHz control bus; supports in-system programming and dynamic reconfiguration.
INTR	Interrupt Output	Open-drain status indicator for loss-of-lock (LOL) or loss-of-signal (LOS); active-low assertion.
VDD	Core Supply	Single 1.8/2.5/3.3 V core rail; PSRR optimized for low-noise clock generation.
GND, RSVD_GND	Ground Terminals	Multiple dedicated ground pins including reserved ground (RSVD_GND) for noise isolation and thermal dissipation.

Key Features

Feature	Design Value
MultiSynth™ Any-Frequency Synthesis	Generates four independent, zero-ppm-accurate output frequencies simultaneously - eliminates need for multiple XO/VCXO components.
PCIe Gen 1–4 Compliance	Fully compliant with PCIe Gen 1/2/3 Common Clock and Gen 3 Separate Reference No Spread (SRNS); validated per Intel Clock Jitter Tool v1.6.4.
Independent Phase/Frequency Adjustment	Glitchless ±45 ns phase offset and 1 ppm frequency step tuning via pin control or I²C - enables real-time clock margining and skew calibration.
Configurable Spread Spectrum	Programmable down-spread (0.5–5.0%) at 33–63 kHz on any output - reduces EMI without requiring board-level filtering.
Flexible Input Architecture	Five input options (IN1–IN6) support crystal, single-ended, or differential references - simplifies system clock tree design and reference redundancy.
Low-Power Operation	45 mA typical core current at 100 MHz output; <12 mA in buffer-only mode - suitable for thermally constrained FPGA/ASIC carrier cards.

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch/Routing
Use Scenario: High-density 32-lane PCIe Gen 4 switch ASIC requiring four synchronized clocks: 100 MHz reference, 250 MHz SerDes, 156.25 MHz PHY, and 125 MHz management interface. IC Role / Device Role / Timing Role: Quad clock generator providing independent, low-jitter, spread-spectrum-capable outputs with precise phase alignment across lanes. Use Value: Replaces four discrete oscillators; achieves <0.45 ps RMS jitter on 100 MHz HCSL outputs per PCIe Gen 4 spec, reducing bit error rate in high-speed interconnects.	Use Scenario: 10 GbE/25 GbE line card with multi-port Ethernet PHYs needing 156.25 MHz, 312.5 MHz, and 125 MHz clocks with tight skew control. IC Role / Device Role / Timing Role: Programmable clock source delivering differential LVDS/HCSL outputs with <100 ps output-to-output skew and independent voltage rails. Use Value: Enables single-chip timing for mixed-rate PHYs; independent VDDOx supplies allow 1.8 V LVDS for SerDes and 2.5 V CMOS for management logic.
Broadcast Video Timing	Processor & FPGA Clocking
Use Scenario: SMPTE ST 2082/2081 video router requiring genlock-capable 27 MHz, 74.25 MHz, and 148.5 MHz pixel clocks with sub-20 ps phase step resolution. IC Role / Device Role / Timing Role: Precision clock synthesizer supporting frame-accurate phase adjustment and zero-delay feedback mode for master-slave synchronization. Use Value: Achieves <20 ps phase step accuracy and <0.7 ps RMS jitter - meets SMPTE ST 2059-2 PTP timing stability requirements for broadcast infrastructure.	Use Scenario: Xilinx Versal ACAP and Intel Agilex FPGA platform requiring multiple domain clocks: 300 MHz PL fabric, 500 MHz DDR4 controller, 100 MHz configuration, and 200 MHz debug interface. IC Role / Device Role / Timing Role: Configurable quad-output generator with independent format/voltage per output - supports LVDS, HCSL, and CMOS loads simultaneously. Use Value: Eliminates external level translators; 1.5–3.3 V VDDOx flexibility allows direct connection to diverse I/O banks without voltage translation circuitry.

PCIe Gen 4 Switch Timing

Ethernet Switch/Routing

Use Scenario: High-density 32-lane PCIe Gen 4 switch ASIC requiring four synchronized clocks: 100 MHz reference, 250 MHz SerDes, 156.25 MHz PHY, and 125 MHz management interface.

IC Role / Device Role / Timing Role: Quad clock generator providing independent, low-jitter, spread-spectrum-capable outputs with precise phase alignment across lanes.

Use Value: Replaces four discrete oscillators; achieves <0.45 ps RMS jitter on 100 MHz HCSL outputs per PCIe Gen 4 spec, reducing bit error rate in high-speed interconnects.

Use Scenario: 10 GbE/25 GbE line card with multi-port Ethernet PHYs needing 156.25 MHz, 312.5 MHz, and 125 MHz clocks with tight skew control.

IC Role / Device Role / Timing Role: Programmable clock source delivering differential LVDS/HCSL outputs with <100 ps output-to-output skew and independent voltage rails.

Use Value: Enables single-chip timing for mixed-rate PHYs; independent VDDOx supplies allow 1.8 V LVDS for SerDes and 2.5 V CMOS for management logic.

Broadcast Video Timing

Processor & FPGA Clocking

Use Scenario: SMPTE ST 2082/2081 video router requiring genlock-capable 27 MHz, 74.25 MHz, and 148.5 MHz pixel clocks with sub-20 ps phase step resolution.

IC Role / Device Role / Timing Role: Precision clock synthesizer supporting frame-accurate phase adjustment and zero-delay feedback mode for master-slave synchronization.

Use Value: Achieves <20 ps phase step accuracy and <0.7 ps RMS jitter - meets SMPTE ST 2059-2 PTP timing stability requirements for broadcast infrastructure.

Use Scenario: Xilinx Versal ACAP and Intel Agilex FPGA platform requiring multiple domain clocks: 300 MHz PL fabric, 500 MHz DDR4 controller, 100 MHz configuration, and 200 MHz debug interface.

IC Role / Device Role / Timing Role: Configurable quad-output generator with independent format/voltage per output - supports LVDS, HCSL, and CMOS loads simultaneously.

Use Value: Eliminates external level translators; 1.5–3.3 V VDDOx flexibility allows direct connection to diverse I/O banks without voltage translation circuitry.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5338A-B03798-GM	Same silicon die and pinout; differs only in factory-programmed NVM configuration (default frequency map and I²C address).	Pre-programmed for specific customer use case; SI5338C-B03798-GMR is blank OTP and requires full ClockBuilder Pro configuration.	Select SI5338C-B03798-GMR when custom frequency plans, spread spectrum profiles, or dynamic reprogramming via I²C are required.
LMK04832RHAR	Two PLLs (not four independent MultiSynths); higher power (120 mA typ); larger 48-QFN package; supports JESD204B deterministic latency.	Targeted at JESD204B baseband and radar systems; lacks PCIe Gen 4 SRNS validation and independent per-output voltage rails.	Choose LMK04832RHAR only if deterministic latency or dual-loop cascaded jitter cleaning is mandatory; otherwise SI5338C-B03798-GMR offers superior integration and lower footprint.

Compared with Si5338A-B03798-GM, SI5338C-B03798-GMR provides full field programmability and blank OTP memory, while versus LMK04832RHAR it delivers smaller size, lower power, PCIe Gen 4 compliance, and per-output voltage configurability - making it optimal for space-constrained, multi-standard serial interface timing.

Availability

SI5338C-B03798-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switching/routing, and broadcast video timing applications requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.

Supply support for SI5338C-B03798-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The Si5338 product line was designed specifically for high-performance, multi-protocol serial interface timing - addressing PCIe, Ethernet, Fibre Channel, and broadcast video clocking with single-chip flexibility and ultra-low jitter.

FAQ

What is the default configuration of SI5338C-B03798-GMR at power-up?

The SI5338C-B03798-GMR ships with blank one-time-programmable (OTP) memory and no factory-loaded configuration. Upon power-up, it enters a known reset state with all outputs disabled and requires full initialization via I²C using ClockBuilder Pro or custom firmware. This distinguishes it from pre-programmed variants like Si5338A-B03798-GM.

Does SI5338C-B03798-GMR support PCIe Gen 4 Separate Reference No Spread (SRNS) mode?

Yes, SI5338C-B03798-GMR is validated for PCIe Gen 4 SRNS operation with ≤0.32 ps RMS jitter (typical) under specified conditions: PLL bandwidth 2–5 MHz, CDR = 10 MHz, and HCSL 100 MHz outputs. This compliance is documented in Skyworks' Si5338 datasheet Rev. 1.6, Table 12.

Can SI5338C-B03798-GMR generate four different output frequencies simultaneously?

Yes, SI5338C-B03798-GMR uses four independent MultiSynth™ synthesis blocks to generate four distinct output frequencies - each ranging from 0.16 to 710 MHz - with zero ppm frequency error and independent format/voltage configuration. This capability is confirmed in the device's functional block diagram and "Features" section.

What is the maximum differential input frequency supported by SI5338C-B03798-GMR?

SI5338C-B03798-GMR supports differential input frequencies up to 710 MHz on pins IN1/IN2 and IN5/IN6, as specified in Table 6 of the datasheet. This enables direct use of high-speed SerDes reference clocks without external division or conditioning.

How does the spread-spectrum feature work on SI5338C-B03798-GMR?

SI5338C-B03798-GMR provides per-output spread-spectrum clocking with programmable parameters: spread magnitude (0.5–5.0%), modulation rate (33–63 kHz), and direction (down-spread only). It operates on any output format (LVPECL/LVDS/HCSL/CMOS) and is configured via I²C registers - no external components required.

SI5338C-B03798-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338C-B03798-GMR FAQ

1.How can I place an order for SI5338C-B03798-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338C-B03798-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338C-B03798-GMR reliable?

The price and inventory of SI5338C-B03798-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338C-B03798-GMR is usually 5 days.

3.What payment methods are accepted for SI5338C-B03798-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338C-B03798-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338C-B03798-GMR?

SI5338C-B03798-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338C-B03798-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338C-B03798-GMR?

For technical support, including SI5338C-B03798-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338C-B03798-GMR requirements.

6.How does Aetrix verify that SI5338C-B03798-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338C-B03798-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338C-B03798-GMR meets industry standards.

7.What is the process for return or replacement of SI5338C-B03798-GMR?

All SI5338C-B03798-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338C-B03798-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338C-B03798-GMR part is unused and in its original packaging.

Return procedure for SI5338C-B03798-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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