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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338C-B04068-GMR

Name: SI5338C-B04068-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338C-B04068-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338C-B04068-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338C-B04068-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338C-B04068-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independent differential output drivers, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL output formats across 0.16–710 MHz. It replaces up to four crystal oscillators in high-speed networking and FPGA timing applications.

For engineers reviewing the SI5338C-B04068-GMR datasheet, SI5338C-B04068-GMR pinout, SI5338C-B04068-GMR application, or SI5338C-B04068-GMR equivalent, key selection criteria include its MultiSynth™-based any-frequency synthesis, independent per-output voltage (1.5/1.8/2.5/3.3 V), 24-pin 4×4 mm QFN package, and I²C/SMBus programmability with ClockBuilder Pro support.

Technical Context

The SI5338C-B04068-GMR implements a two-stage PLL architecture: a high-stability reference stage (input range 5–710 MHz) feeding a fractional-N MultiSynth™ synthesis stage per output. Each of the four outputs features independent frequency, format, voltage, phase offset (±45 ns), and spread-spectrum control (0.5–5.0% spread, 33–63 kHz modulation).

It supports flexible reference inputs - external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) - and operates from a single 1.8/2.5/3.3 V core supply with 45 mA typical current draw. Loss-of-lock and loss-of-signal alarms are integrated for system monitoring.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count & type	4 independent differential clock outputs (CLK0A/B through CLK3A/B), configurable as LVPECL/LVDS/HCSL/CML/SSTL/HSTL/CMOS
Phase jitter (RMS)	0.7 ps typical (12 kHz–20 MHz), meeting PCIe Gen 3 SRNS and Gen 4 common clock requirements
Frequency range	0.16–710 MHz per output; supports integer/fractional synthesis with 1 ppb resolution
Input reference	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz)
Supply & power	Single 1.8/2.5/3.3 V core supply; 45 mA typical IDD at 100 MHz on all outputs and 25 MHz refclk
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch, exposed thermal pad
Operating temp	–40 °C to +85 °C ambient, qualified for industrial and telecom line card environments

Pinout & Package

SI5338C-B04068-GMR is housed in a 24-pin, 4 × 4 mm QFN package with wettable flank leads and an exposed thermal pad. Pin 1 is top-left (IN1), with pins numbered counter-clockwise; pin 24 is bottom-left (GND). The package supports reflow per JEDEC J-STD-020 and achieves θ_JA = 37 °C/W in still air.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential input pairs	Accept AC-coupled differential clocks up to 710 MHz; require external 100 Ω termination
IN3, IN4	Single-ended input pins	Support CMOS/SSTL/HSTL inputs (5–350 MHz); VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A–CLK3B	Differential output pairs (4 channels)	Each pair independently configurable for LVPECL/LVDS/HCSL/CML; VDDOx supplies set per-output voltage (1.5–3.3 V)
VDD, VDDO0–VDDO3	Power supply terminals	VDD = core supply (1.8/2.5/3.3 V); VDDOx = dedicated output buffer supplies (1.4–3.63 V)
SCL, SDA, INTR	I²C interface & interrupt	SCL/SDA support 400 kHz fast-mode I²C/SMBus; INTR asserts open-drain loss-of-lock/loss-of-signal alarm
GND, RSVD_GND	Ground connections	Multiple GND pins and reserved ground pad ensure low-noise return paths and thermal dissipation

Key Features

Feature	Design Value
Any-frequency synthesis	Four independent MultiSynth™ engines enable true zero-ppm accuracy on each output, eliminating need for multiple crystals
Per-output voltage control	Independent VDDOx supplies allow mixed-voltage clocking (e.g., 1.8 V FPGA core + 3.3 V legacy PHY) without level shifters
Glitchless frequency tuning	Pin-controlled or I²C-based frequency increment/decrement in 1 ppm steps, with <667 ns update time above 18 MHz
Programmable phase alignment	±45 ns phase offset per output in <20 ps steps, enabling precise skew management across multi-lane interfaces
Configurable spread spectrum	Per-output SSC with adjustable spread (0.5–5.0%), rate (33–63 kHz), and direction - reduces EMI in dense PCB layouts

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch Clocking
Use Scenario: 100 GbE switch ASIC requiring synchronized 100 MHz and 156.25 MHz clocks with sub-ps jitter for SerDes CDR lock. IC Role / Device Role / Timing Role: Primary clock generator providing PCIe Gen 4 Common Clock and Ethernet reference clocks with SRNS compliance. Use Value: Meets PCIe Gen 4 RMS jitter spec (≤0.45 ps) and IEEE 802.3bj random jitter limits using same device, reducing BOM count and layout complexity.	Use Scenario: Layer-3 enterprise switch supporting 1 GbE, 10 GbE, and 25 GbE ports with mixed signal integrity requirements. IC Role / Device Role / Timing Role: Quad-output timing source delivering 125 MHz (GbE), 156.25 MHz (10GbE), 250 MHz (25GbE), and 10 MHz management clock. Use Value: Independent output configuration enables optimal drive strength and format per port (e.g., HCSL for 25GbE, LVDS for 10GbE), minimizing inter-port crosstalk.
FPGA Processor Clocking	Broadcast Video Timing
Use Scenario: High-end Xilinx Versal or Intel Agilex FPGA used in real-time video processing, requiring multiple domain clocks (logic, memory, transceivers). IC Role / Device Role / Timing Role: Centralized clock synthesizer generating 300 MHz (PL logic), 1 GHz (DDR4), 500 MHz (GT transceivers), and 100 MHz (system management). Use Value: Fractional synthesis eliminates clock tree mismatches; per-output phase adjustment aligns setup/hold margins across clock domains.	Use Scenario: SMPTE ST 2082-1 (12G-SDI) broadcast router needing ultra-low-jitter 74.25 MHz and 148.5 MHz reference clocks. IC Role / Device Role / Timing Role: Precision timing IC delivering dual 12G-SDI reference clocks with <1 ps RMS jitter and deterministic phase relationship. Use Value: 0.7 ps RMS jitter meets SMPTE ST 2082-1 BER requirements; independent phase control ensures frame-sync across multiple video paths.

PCIe Gen 4 Switch Timing

Ethernet Switch Clocking

Use Scenario: 100 GbE switch ASIC requiring synchronized 100 MHz and 156.25 MHz clocks with sub-ps jitter for SerDes CDR lock.

IC Role / Device Role / Timing Role: Primary clock generator providing PCIe Gen 4 Common Clock and Ethernet reference clocks with SRNS compliance.

Use Value: Meets PCIe Gen 4 RMS jitter spec (≤0.45 ps) and IEEE 802.3bj random jitter limits using same device, reducing BOM count and layout complexity.

Use Scenario: Layer-3 enterprise switch supporting 1 GbE, 10 GbE, and 25 GbE ports with mixed signal integrity requirements.

IC Role / Device Role / Timing Role: Quad-output timing source delivering 125 MHz (GbE), 156.25 MHz (10GbE), 250 MHz (25GbE), and 10 MHz management clock.

Use Value: Independent output configuration enables optimal drive strength and format per port (e.g., HCSL for 25GbE, LVDS for 10GbE), minimizing inter-port crosstalk.

FPGA Processor Clocking

Broadcast Video Timing

Use Scenario: High-end Xilinx Versal or Intel Agilex FPGA used in real-time video processing, requiring multiple domain clocks (logic, memory, transceivers).

IC Role / Device Role / Timing Role: Centralized clock synthesizer generating 300 MHz (PL logic), 1 GHz (DDR4), 500 MHz (GT transceivers), and 100 MHz (system management).

Use Value: Fractional synthesis eliminates clock tree mismatches; per-output phase adjustment aligns setup/hold margins across clock domains.

Use Scenario: SMPTE ST 2082-1 (12G-SDI) broadcast router needing ultra-low-jitter 74.25 MHz and 148.5 MHz reference clocks.

IC Role / Device Role / Timing Role: Precision timing IC delivering dual 12G-SDI reference clocks with <1 ps RMS jitter and deterministic phase relationship.

Use Value: 0.7 ps RMS jitter meets SMPTE ST 2082-1 BER requirements; independent phase control ensures frame-sync across multiple video paths.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5338A-B04068-GM	Same Si5338 family, but A-grade variant with extended temperature range (–40 to +105 °C) and tighter jitter specs (0.6 ps RMS typ)	Preferred for automotive infotainment or industrial control where ambient exceeds +85 °C	Select if operating temperature >85 °C or jitter margin <0.1 ps is required; otherwise SI5338C-B04068-GMR is cost-optimized for commercial telecom/networking use.
LMK04832RHAR	TI dual-loop jitter cleaner with 2 inputs, 14 outputs; higher integration but fixed 12-output topology and no per-output voltage control	Better suited for systems requiring jitter cleaning + fanout rather than pure any-frequency synthesis	Choose when input clock quality is poor and jitter attenuation is critical; SI5338C-B04068-GMR excels in clean-reference, multi-frequency generation scenarios.

Compared with Si5338A-B04068-GM, SI5338C-B04068-GMR offers identical functionality at lower cost for commercial-temperature designs; versus LMK04832RHAR, it provides superior flexibility in per-output format/voltage control and simpler I²C programming, though with fewer total outputs.

Availability

SI5338C-B04068-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switch clocking, and FPGA processor clocking requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338C-B04068-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, and industrial markets.

The Si5338 product line delivers highly configurable, low-jitter clock generation for high-speed serial interfaces including PCIe, Ethernet, Fibre Channel, and broadcast video, emphasizing design flexibility and system-level timing consolidation.

FAQ

What is the maximum output frequency supported by SI5338C-B04068-GMR?

The SI5338C-B04068-GMR supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, 250 MHz on HCSL, and 200 MHz on CMOS. Frequencies above 350 MHz are limited to two unique values simultaneously (Fvco/4 and Fvco/6), as specified in the functional description section of the datasheet. All outputs maintain 0.7 ps RMS typical jitter within their respective ranges.

Does SI5338C-B04068-GMR support PCIe Gen 4 Common Clock compliance?

Yes, SI5338C-B04068-GMR meets PCIe Gen 4 Common Clock RMS jitter requirements (≤0.45 ps, 10 kHz–50 MHz) when configured with appropriate PLL bandwidth (2–4 or 2–5 MHz) and CDR settings (10 MHz). This is verified in Table 12 of the datasheet under "PCIe Gen 4, Common Clock" test conditions.

Can SI5338C-B04068-GMR generate different output voltages on each channel?

Yes, SI5338C-B04068-GMR supports independent output supply voltages via VDDO0–VDDO3 pins, allowing each of the four output drivers to be set to 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This enables direct interfacing with mixed-voltage systems - for example, driving a 1.8 V FPGA core and a 3.3 V legacy PHY without external level shifters.

How is SI5338C-B04068-GMR programmed, and what tools are required?

SI5338C-B04068-GMR is programmed via its I²C/SMBus-compatible interface (SCL/SDA pins) using Skyworks' ClockBuilder Pro software. The tool auto-generates register configurations, validates timing constraints, and exports .c files or I²C scripts. No external hardware programmer is needed - standard microcontroller GPIO or evaluation board I²C master suffices.

What reference clock sources are compatible with SI5338C-B04068-GMR?

SI5338C-B04068-GMR accepts multiple reference types: external crystal (8–30 MHz), single-ended CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz). Input pins IN1/IN2 and IN5/IN6 support differential signals with internal 10 kΩ termination; IN3/IN4 accept single-ended inputs with programmable threshold levels.

SI5338C-B04068-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338C-B04068-GMR FAQ

1.How can I place an order for SI5338C-B04068-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338C-B04068-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338C-B04068-GMR reliable?

The price and inventory of SI5338C-B04068-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338C-B04068-GMR is usually 5 days.

3.What payment methods are accepted for SI5338C-B04068-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338C-B04068-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338C-B04068-GMR?

SI5338C-B04068-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338C-B04068-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338C-B04068-GMR?

For technical support, including SI5338C-B04068-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338C-B04068-GMR requirements.

6.How does Aetrix verify that SI5338C-B04068-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338C-B04068-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338C-B04068-GMR meets industry standards.

7.What is the process for return or replacement of SI5338C-B04068-GMR?

All SI5338C-B04068-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338C-B04068-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338C-B04068-GMR part is unused and in its original packaging.

Return procedure for SI5338C-B04068-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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