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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338C-B04190-GM

Name: SI5338C-B04190-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338C-B04190-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338C-B04190-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338C-B04190-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338C-B04190-GM from Skyworks Solutions is a quad-output, I²C-programmable clock generator with MultiSynth™ frequency synthesis. It delivers four independent, any-frequency outputs (0.16–710 MHz) with 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 compliance, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats in a 4 × 4 mm 24-QFN package. It serves as a drop-in replacement for up to four crystal oscillators in high-speed serial interface timing.

For engineers reviewing the SI5338C-B04190-GM datasheet, SI5338C-B04190-GM pinout, SI5338C-B04190-GM application, or SI5338C-B04190-GM equivalent, key selection criteria include PCIe SRNS compliance, independent per-output voltage control (1.5–3.3 V), sub-20 ps phase step resolution, spread-spectrum programmability (0.5–5.0% at 33–63 kHz), and external feedback mode for zero-delay operation.

Technical Context

The SI5338C-B04190-GM implements a two-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesis blocks. Each output driver supports configurable format, voltage, and termination, enabling simultaneous generation of non-integer-related frequencies across differential and single-ended standards.

It accepts six input sources - dual differential (IN1/IN2, IN5/IN6), dual single-ended (IN3/IN4), and optional crystal (8–30 MHz) - with loss-of-signal detection and programmable lock thresholds. Internal OTP memory stores factory-configured settings, and I²C/SMBus interface enables runtime reconfiguration without reset.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count & type	4 differential clock outputs (CLK0A/B through CLK3A/B); supports 8 single-ended or mixed configurations
Frequency range	0.16–710 MHz per output; integer/fractional synthesis with 1 ppb resolution
Phase jitter (RMS)	0.7 ps typical (12 kHz–20 MHz), meeting PCIe Gen 4 common clock and SRNS requirements
Supply voltages	Core: 1.8/2.5/3.3 V; independent output buffers: 1.5/1.8/2.5/3.3 V per driver
Input flexibility	Supports 5–710 MHz differential, 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL, or 8–30 MHz crystal reference
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch, exposed thermal pad
Operating temp	–40 °C to +85 °C ambient, qualified for industrial and telecom line card environments

Pinout & Package

SI5338C-B04190-GM is housed in a 24-lead, 4 × 4 mm QFN package with wettable flank leads and an exposed thermal pad. Pin 1 is top-left corner (IN1), pin 24 is bottom-right (GND). The package supports standard reflow profiles per JEDEC J-STD-020 and provides low thermal resistance (θ_JA = 37 °C/W).

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential clock inputs	Accept AC-coupled LVDS/LVPECL/CML signals up to 710 MHz; internal 100 Ω termination enabled
IN3, IN4	Single-ended clock inputs	DC-coupled CMOS/SSTL/HSTL inputs (5–350 MHz); 20 kΩ pull-up/pull-down configurable
CLK0A–CLK3B	Differential clock outputs	Four independent pairs; each pair supports LVPECL/LVDS/HCSL/CML with per-driver VDDO supply
VDDO0–VDDO3	Output buffer supplies	Independent 1.5/1.8/2.5/3.3 V rails per output bank; decoupling required per bank
VDD	Core supply	Single 1.8/2.5/3.3 V core rail; PSRR > 60 dB up to 100 MHz
SCL, SDA	I²C interface	Standard SMBus-compatible 100/400 kHz interface; supports multi-master arbitration
INTR	Interrupt output	Open-drain status flag for loss-of-lock, loss-of-signal, or configuration error events
RSVD_GND	Reserved ground	Internal test pin; must be connected to GND for proper thermal and EMI performance

Key Features

Feature	Design Value
Independent per-output voltage control	Each of four output banks powered separately (1.5/1.8/2.5/3.3 V), enabling mixed-voltage system interfacing without level shifters
Glitchless frequency tuning	1 ppm step size via PINC/FDEC pins or I²C; update time < 667 ns above 18 MHz output frequency
Programmable phase offset	±45 ns range with < 20 ps step resolution per output, enabling precise skew alignment in multi-lane interfaces
Configurable spread spectrum	0.5–5.0% down-spread at 33–63 kHz modulation rate on any output, reducing EMI peak emissions by >10 dB
External feedback mode	Enables zero-delay clock distribution by feeding back one output to INx, eliminating propagation delay accumulation

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch Clocking
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switch ASICs in a data center fabric. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent, low-jitter HCSL clocks with SRNS compliance and matched phase alignment. Use Value: Eliminates need for four discrete oscillators while maintaining < 0.32 ps RMS jitter per PCIe Gen 4 SRNS spec, reducing BOM cost and board area by 65%.	Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10/25 GbE PHYs and MACs in a modular Ethernet switch. IC Role / Device Role / Timing Role: Any-frequency synthesizer producing exact IEEE 802.3-compliant rates from a single 25 MHz crystal reference. Use Value: Achieves true zero-ppm accuracy on all outputs, avoiding frequency translation errors that cause packet loss in high-throughput switching.
Broadcast Video Sync Generator	FPGA-Based Test Equipment
Use Scenario: Delivering frame-synced 27 MHz, 74.25 MHz, and 148.5 MHz clocks to SDI transmitters, receivers, and video processors in broadcast infrastructure. IC Role / Device Role / Timing Role: Programmable quad clock source supporting SMPTE ST 2081/2082 timing standards with sub-20 ps inter-output skew. Use Value: Enables deterministic phase relationships between video, audio, and ancillary data paths, preventing lip-sync drift and frame misalignment.	Use Scenario: Providing precisely timed stimulus and capture clocks (e.g., 200 MHz, 400 MHz, 800 MHz) to high-speed digital I/O banks on Xilinx Versal or Intel Agilex FPGAs. IC Role / Device Role / Timing Role: Reconfigurable clock generator with independent output enable/disable and glitchless frequency stepping for dynamic test pattern generation. Use Value: Allows real-time clock rate changes during functional testing without FPGA reconfiguration, cutting test cycle time by 40%.

PCIe Gen 4 Switch Timing

Ethernet Switch Clocking

Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switch ASICs in a data center fabric.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent, low-jitter HCSL clocks with SRNS compliance and matched phase alignment.

Use Value: Eliminates need for four discrete oscillators while maintaining < 0.32 ps RMS jitter per PCIe Gen 4 SRNS spec, reducing BOM cost and board area by 65%.

Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10/25 GbE PHYs and MACs in a modular Ethernet switch.

IC Role / Device Role / Timing Role: Any-frequency synthesizer producing exact IEEE 802.3-compliant rates from a single 25 MHz crystal reference.

Use Value: Achieves true zero-ppm accuracy on all outputs, avoiding frequency translation errors that cause packet loss in high-throughput switching.

Broadcast Video Sync Generator

FPGA-Based Test Equipment

Use Scenario: Delivering frame-synced 27 MHz, 74.25 MHz, and 148.5 MHz clocks to SDI transmitters, receivers, and video processors in broadcast infrastructure.

IC Role / Device Role / Timing Role: Programmable quad clock source supporting SMPTE ST 2081/2082 timing standards with sub-20 ps inter-output skew.

Use Value: Enables deterministic phase relationships between video, audio, and ancillary data paths, preventing lip-sync drift and frame misalignment.

Use Scenario: Providing precisely timed stimulus and capture clocks (e.g., 200 MHz, 400 MHz, 800 MHz) to high-speed digital I/O banks on Xilinx Versal or Intel Agilex FPGAs.

IC Role / Device Role / Timing Role: Reconfigurable clock generator with independent output enable/disable and glitchless frequency stepping for dynamic test pattern generation.

Use Value: Allows real-time clock rate changes during functional testing without FPGA reconfiguration, cutting test cycle time by 40%.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output programmable clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D06189-GM	Higher integration: includes integrated crystal, lower jitter (0.35 ps RMS), but fixed 4-output LVDS-only; no HCSL/CMOS support	Best for space-constrained, crystal-less designs where only LVDS outputs are needed and ultra-low jitter is critical	Select when crystal integration and lowest possible jitter outweigh format flexibility and I²C configurability
ICS854S01IAGLF	Non-programmable, fixed-frequency quad LVDS generator; no I²C interface; 1.2 ps RMS jitter; 3.3 V only	Used in legacy systems requiring simple, low-cost clock fanout without frequency agility	Select only for static clock trees where all frequencies are known pre-production and no runtime adjustment is needed

Compared with Si5332A-D06189-GM and ICS854S01IAGLF, the SI5338C-B04190-GM uniquely balances full I²C programmability, multi-format output flexibility, and PCIe Gen 4 compliance - making it optimal for next-generation adaptive timing architectures requiring field-upgradable clock trees.

Availability

SI5338C-B04190-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switch clocking, and broadcast video sync generation requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5338C-B04190-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog semiconductors, specializing in RF, mobile, infrastructure, and timing solutions with over 30 years of RF and precision timing IP.

The Si5338 family was designed specifically for high-speed serial interface timing in datacenter, telecom, and broadcast systems - emphasizing low jitter, multi-standard compatibility, and software-defined configurability.

FAQ

What is the maximum output frequency supported by the SI5338C-B04190-GM?

The SI5338C-B04190-GM supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, 250 MHz on HCSL, and 200 MHz on CMOS. Above 350 MHz, only two unique frequencies can be generated simultaneously (Fvco/4 and Fvco/6), as confirmed in Table 6 of the datasheet Rev. 1.6.

Does the SI5338C-B04190-GM support PCIe Gen 4 Separate Reference No Spread (SRNS) compliance?

Yes, the SI5338C-B04190-GM meets PCIe Gen 4 SRNS requirements with 0.11–0.32 ps RMS jitter (typical 0.11 ps) when configured with PLL bandwidth of 2–4 MHz and CDR = 10 MHz, as specified in Table 12 of the datasheet Rev. 1.6.

Can the SI5338C-B04190-GM generate different output voltages on each of its four output banks?

Yes, the SI5338C-B04190-GM supports independent VDDO supplies (VDDO0–VDDO3) per output bank, allowing each to be set to 1.5 V, 1.8 V, 2.5 V, or 3.3 V - enabling direct interfacing with mixed-voltage devices like 1.8 V FPGAs and 3.3 V legacy PHYs without external level shifters.

How is the SI5338C-B04190-GM programmed, and is external hardware required?

The SI5338C-B04190-GM is programmed via its I²C/SMBus interface using ClockBuilder Pro software from Skyworks. No external programmer is required - configuration is performed over the same SCL/SDA pins used in-system, and factory OTP settings can be preloaded for boot-time operation.

What is the thermal performance of the SI5338C-B04190-GM in its 4 × 4 mm QFN package?

The SI5338C-B04190-GM has a junction-to-ambient thermal resistance (θ_JA) of 37 °C/W under still air conditions and junction-to-case (θ_JC) of 10 °C/W, as measured per JEDEC standards. Its exposed thermal pad must be soldered to a minimum 100 mm² copper pour for reliable operation at full load (45 mA core current) across –40 to +85 °C.

SI5338C-B04190-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338C-B04190-GM FAQ

1.How can I place an order for SI5338C-B04190-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338C-B04190-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338C-B04190-GM reliable?

The price and inventory of SI5338C-B04190-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338C-B04190-GM is usually 5 days.

3.What payment methods are accepted for SI5338C-B04190-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338C-B04190-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338C-B04190-GM?

SI5338C-B04190-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338C-B04190-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338C-B04190-GM?

For technical support, including SI5338C-B04190-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338C-B04190-GM requirements.

6.How does Aetrix verify that SI5338C-B04190-GM is sourced from the original manufacturer or authorized distributors?

All SI5338C-B04190-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338C-B04190-GM meets industry standards.

7.What is the process for return or replacement of SI5338C-B04190-GM?

All SI5338C-B04190-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338C-B04190-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338C-B04190-GM part is unused and in its original packaging.

Return procedure for SI5338C-B04190-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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