Skyworks Solutions Inc. SI5338C-B04268-GMR
- Part No.:
- SI5338C-B04268-GMR
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Application Specific Clock/Timing
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
SI5338C-B04268-GMR.pdf
- Description:
- I2C CONTROL, 4-OUTPUT, ANY FREQU
- Quantity:
- Payment:

- Shipping:

Inventory:3,874
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Product details
Overview
SI5338C-B04268-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 and SRNS compliance, and MultiSynth™ frequency synthesis supporting 0.16–710 MHz output ranges across LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats. It replaces up to four crystal oscillators in high-speed networking and FPGA clocking applications.
For engineers reviewing the SI5338C-B04268-GMR datasheet, SI5338C-B04268-GMR pinout, SI5338C-B04268-GMR application, or SI5338C-B04268-GMR equivalent, key selection considerations include its 24-QFN package, independent per-output voltage (1.5/1.8/2.5/3.3 V), 1 ppm frequency increment/decrement capability, <20 ps phase step resolution, and spread-spectrum control on any output from 5–350 MHz.
Technical Context
The SI5338C-B04268-GMR implements a two-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesizers, each driving a configurable output buffer. Its input flexibility supports external crystals (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), and differential clocks (5–710 MHz).
Each of the four output drivers supports independent format selection (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL), independent supply voltage (1.5–3.3 V), programmable initial phase offset (±45 ns), and glitchless frequency adjustment in 1 ppm steps. The device operates across –40 to +85 °C with core supply options at 1.8/2.5/3.3 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Phase Jitter (RMS) | 0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3 SRNS & Gen 4 common clock requirements |
| Output Frequency Range | 0.16–710 MHz per channel; supports integer/fractional synthesis with 1 ppb resolution |
| Input Reference Support | Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz) |
| Output Format Flexibility | LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL per driver; independent voltage per output (1.5/1.8/2.5/3.3 V) |
| Spread Spectrum | Configurable on any output: 0.5–5.0% spread, 33–63 kHz modulation rate, 5–350 MHz range |
| Package & Size | 24-pin QFN, 4 × 4 mm footprint; compatible with standard reflow profiles and JEDEC J-STD-020 |
| Operating Temperature | –40 to +85 °C ambient; validated for industrial and telecom line card deployment |
Pinout & Package
SI5338C-B04268-GMR uses a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Rev. 1.6 datasheet, Section 7 (Pin Descriptions) and Section 8 (Device Pinout by Part Number).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN1, IN2, IN5, IN6 | Differential Input Pairs | Accept AC-coupled differential clocks up to 710 MHz; require external 100 Ω termination |
| IN3, IN4 | Single-Ended Input | Support CMOS/SSTL/HSTL inputs (5–350 MHz); VIH = 0.7×VDD, VIL = 0.3×VDD |
| CLK0A–CLK3B | Differential Output Pairs | Four independent output channels; each pair supports LVPECL/LVDS/HCSL/CML |
| VDDO0–VDDO3 | Output Buffer Supplies | Independent 1.5/1.8/2.5/3.3 V supplies per output bank; enable mixed-voltage system interfacing |
| SCL, SDA | I²C Interface | SMBus-compatible serial interface (up to 400 kHz); used for configuration and status monitoring |
| INTR | Interrupt Output | Open-drain alarm signal for loss-of-lock (LOL) and loss-of-signal (LOS) events |
Key Features
| Feature | Design Value |
|---|---|
| MultiSynth™ Synthesis | Four independent fractional-N synthesizers enabling true zero-ppm accuracy on all outputs simultaneously |
| PCIe Compliance | Fully compliant with PCIe Gen 1/2/3/4 Common Clock and Gen 3 SRNS; validated using Intel Clock Jitter Tool |
| Glitchless Frequency Tuning | 1 ppm step size with <667 ns update time via pin control; eliminates timing disruption during dynamic reconfiguration |
| Programmable Phase Offset | ±45 ns range with <20 ps step resolution per output; enables precise skew management across multi-lane interfaces |
| Flexible Spread Spectrum | Per-output SSC control (0.5–5.0% spread, 33–63 kHz rate) reduces EMI without requiring board-level filtering |
Applications
| PCIe Gen 4 Switch Fabric | Ethernet Switch Timing |
|---|---|
Use Scenario: High-density 100 GbE switch ASIC requiring synchronized 100 MHz and 156.25 MHz clocks with sub-0.5 ps RMS jitter. IC Role / Device Role / Timing Role: Primary clock generator delivering four low-jitter, independently configured outputs to SerDes lanes and management subsystems. Use Value: Meets PCIe Gen 4 common clock TJ spec (<33.6 ps pk-pk) and IEEE 802.3bj jitter limits without external cleanup ICs. |
Use Scenario: Carrier-grade Ethernet switch supporting 1 GbE/10 GbE/25 GbE ports with mixed PHY voltage requirements. IC Role / Device Role / Timing Role: Single-chip clock source providing 25 MHz, 125 MHz, 156.25 MHz, and 312.5 MHz outputs at 1.8 V, 2.5 V, and 3.3 V levels. Use Value: Eliminates four discrete oscillators; reduces BOM count and layout area while maintaining <0.7 ps RMS jitter on all outputs. |
| FPGA-Based Video Processing | Telecom Line Card Synchronization |
Use Scenario: Broadcast video encoder FPGA needing 74.25 MHz (SMPTE), 148.5 MHz (HD-SDI), 297 MHz (3G-SDI), and 100 MHz (PCIe) clocks. IC Role / Device Role / Timing Role: Any-frequency clock synthesizer generating exact SMPTE-compliant frequencies from a single 25 MHz crystal reference. Use Value: Achieves 0 ppm frequency error on all outputs; avoids costly custom crystal sets and simplifies firmware calibration. |
Use Scenario: OTN line card requiring synchronous 155.52 MHz (OC-3), 622.08 MHz (OC-12), 2488.32 MHz (OC-48), and 9953.28 MHz (OC-192) clocks. IC Role / Device Role / Timing Role: Frequency translator converting a 19.44 MHz Stratum 3 reference into multiple SONET/SDH rates with deterministic phase alignment. Use Value: Supports external feedback mode for zero-delay operation; maintains <0.7 ps RMS jitter even under temperature drift. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5332A-D06189-GM | Higher integration: 8 outputs, integrated LDOs, lower jitter (0.35 ps RMS), but larger 32-QFN package | Better suited for multi-ASIC systems requiring >4 clocks; not drop-in due to pin count and power architecture differences | Select when system requires >4 outputs or tighter jitter specs; SI5338C-B04268-GMR remains optimal for cost-sensitive 4-output designs |
| ICS8430I-01T | Fixed-frequency quad LVDS generator; no I²C programming, no spread spectrum, 1.2 ps RMS jitter | Limited to pre-defined frequencies; lacks frequency agility and per-output voltage control | Choose only for static clock trees where reprogramming is unnecessary and jitter margin allows higher baseline noise |
Compared with Si5332A-D06189-GM and ICS8430I-01T, SI5338C-B04268-GMR delivers optimal balance of programmability, jitter performance, and footprint-enabling field-upgradable clock trees in space-constrained telecom and networking hardware without sacrificing PCIe Gen 4 compliance.
Availability
SI5338C-B04268-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch fabrics, carrier-grade Ethernet switches, and broadcast video processing systems requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for SI5338C-B04268-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.
The Si5338 family was designed specifically for high-performance, software-configurable clock generation in datacenter, telecom, and broadcast equipment-emphasizing low jitter, multi-format flexibility, and I²C-based field reprogrammability.
FAQ
What is the maximum output frequency supported by SI5338C-B04268-GMR?
The SI5338C-B04268-GMR supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, and 250 MHz on HCSL. Two unique frequencies above 350 MHz (Fvco/4 and Fvco/6) can be generated simultaneously. All values are confirmed in Table 6 of the Skyworks Rev. 1.6 datasheet.
Does SI5338C-B04268-GMR support PCIe Gen 4 Common Clock compliance?
Yes, SI5338C-B04268-GMR meets PCIe Gen 4 Common Clock RMS jitter requirements (0.15–0.45 ps RMS, 10 kHz–50 MHz) as verified in Table 12 of the Skyworks Rev. 1.6 datasheet and validated using the Skyworks PCIe Clock Jitter Tool and Intel Clock Jitter Tool v1.6.4.
Can SI5338C-B04268-GMR generate different output voltages on each channel?
Yes, SI5338C-B04268-GMR provides independent VDDO0–VDDO3 supplies, allowing each of its four output banks to operate at 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This enables direct interfacing with mixed-voltage FPGAs, ASICs, and PHYs without level-shifting components.
How is SI5338C-B04268-GMR programmed, and what tools are required?
SI5338C-B04268-GMR is programmed via its I²C/SMBus interface using Skyworks' ClockBuilder Pro software. The tool auto-generates configuration files, validates jitter performance, and exports register maps for integration into system firmware or bootloaders.
What is the thermal performance of SI5338C-B04268-GMR in continuous operation?
SI5338C-B04268-GMR has a junction-to-ambient thermal resistance (θJA) of 37 °C/W under still-air conditions. At full load (45 mA core current), junction temperature rise is ~1.7 °C above ambient-well within the 150 °C absolute maximum rating and suitable for sealed industrial enclosures.
SI5338C-B04268-GMR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- MultiSynth™
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- PLL:
- -
- Main Purpose:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 24-QFN (4x4)
SI5338C-B04268-GMR FAQ
1.How can I place an order for SI5338C-B04268-GMR through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5338C-B04268-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5338C-B04268-GMR reliable?
The price and inventory of SI5338C-B04268-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338C-B04268-GMR is usually 5 days.
3.What payment methods are accepted for SI5338C-B04268-GMR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338C-B04268-GMR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5338C-B04268-GMR?
SI5338C-B04268-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5338C-B04268-GMR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5338C-B04268-GMR?
For technical support, including SI5338C-B04268-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338C-B04268-GMR requirements.
6.How does Aetrix verify that SI5338C-B04268-GMR is sourced from the original manufacturer or authorized distributors?
All SI5338C-B04268-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338C-B04268-GMR meets industry standards.
7.What is the process for return or replacement of SI5338C-B04268-GMR?
All SI5338C-B04268-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338C-B04268-GMR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5338C-B04268-GMR part is unused and in its original packaging.
Return procedure for SI5338C-B04268-GMR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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