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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338C-B04461-GM

Name: SI5338C-B04461-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338C-B04461-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338C-B04461-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338C-B04461-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338C-B04461-GM from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 and SRNS compliance, and MultiSynth™ frequency synthesis supporting 0.16–710 MHz output ranges across LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338C-B04461-GM datasheet, SI5338C-B04461-GM pinout, SI5338C-B04461-GM application, or SI5338C-B04461-GM equivalent, key selection considerations include its 24-QFN package, independent per-output voltage (1.5/1.8/2.5/3.3 V), ±20 ps phase step resolution, 1 ppm frequency increment/decrement capability, and support for external crystal (8–30 MHz) or wide-band differential inputs (5–710 MHz).

Technical Context

The SI5338C-B04461-GM implements a two-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesizers, each driving one output pair (CLKxA/CLKxB). Its synthesis engine supports integer and fractional modes, enabling true zero-ppm accuracy on all outputs with programmable initial phase offset (±45 ns) and glitchless frequency adjustment via dedicated control pins or I²C.

Input flexibility includes six clock inputs (IN1–IN6): two differential pairs (IN1/IN2, IN5/IN6), two single-ended CMOS (IN3/IN4), and two additional inputs supporting SSTL/HSTL. Output drivers are fully independent-each configurable for format, voltage, slew rate, and spread-spectrum modulation (0.5–5.0% spread, 33–63 kHz rate)-with loss-of-lock and loss-of-signal alarms for system monitoring.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3/4 SRNS and GbE jitter requirements
Output Frequency Range	0.16–710 MHz per channel; supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats
Input Reference Support	External crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Core Supply Voltage	1.8 V / 2.5 V / 3.3 V ±10%; 45 mA typical core current at 100 MHz on all outputs
Package	24-pin QFN, 4 mm × 4 mm, 0.5 mm pitch; RoHS-compliant, –40 to +85 °C operating range
I²C Interface	SMBus-compatible, 100 kHz / 400 kHz standard/fast mode; supports ClockBuilder Pro configuration
Phase Adjustment Resolution	<20 ps steps per output; ±45 ns total programmable range for skew management

Pinout & Package

SI5338C-B04461-GM uses a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments follow Skyworks' standardized Si5338 pinout: dual differential inputs (IN1/IN2, IN5/IN6), dual single-ended inputs (IN3/IN4), four differential output pairs (CLK0A/CLK0B through CLK3A/CLK3B), three independent VDDO supplies (VDDO0–VDDO3), shared VDD core, SCL/SDA/I²C interface, INTR alarm output, and reserved ground (RSVD_GND).

Pin/Terminal	Circuit Role	Design Meaning
IN1 / IN2	Differential input pair 1	Accepts 5–710 MHz AC-coupled differential clocks; requires external 100 Ω termination
IN3 / IN4	Single-ended CMOS inputs	Support 5–200 MHz; VIH = 0.7×VDD, VIL = 0.3×VDD; 4 pF input capacitance
CLK0A / CLK0B	Differential output pair 0	Configurable format/voltage; 0.16–710 MHz; internal 22 Ω series resistor
VDDO0	Output buffer supply 0	Independent 1.5/1.8/2.5/3.3 V supply for CLK0A/CLK0B driver stage
SCL / SDA	I²C serial interface	SMBus-compatible; supports ClockBuilder Pro programming and runtime reconfiguration
INTR	Interrupt output	Open-drain alarm signal indicating loss-of-lock or loss-of-signal condition

Key Features

Feature	Design Value
MultiSynth™ synthesis	Four independent fractional-N synthesizers enable any-frequency generation (0.16–710 MHz) with 0 ppm precision per output
PCIe Gen 1–4 compliance	Meets Common Clock and Gen 3 SRNS jitter specs (0.11–0.45 ps RMS); validated with Skyworks PCIe Clock Jitter Tool
Flexible output configuration	Each of four output pairs supports independent format (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL), voltage (1.5–3.3 V), and drive strength
Glitchless frequency tuning	Pin-controlled or I²C-based frequency increment/decrement in 1 ppm steps without output interruption
Programmable spread spectrum	Per-output SSC with adjustable spread (0.5–5.0%), modulation rate (33–63 kHz), and center frequency (5–350 MHz)

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch Clocking
Use Scenario: High-density 1U switch chassis requiring synchronized 100 MHz reference clocks for multiple PCIe Gen 4 root complexes and endpoints. IC Role / Device Role / Timing Role: Quad clock generator providing four independent, low-jitter 100 MHz HCSL clocks compliant with PCIe Gen 4 Common Clock and SRNS specifications. Use Value: Eliminates four discrete oscillators; enables board-level jitter margin optimization via per-output phase alignment and SSC control.	Use Scenario: 10 GbE/25 GbE line card with multi-port PHYs needing precise 156.25 MHz and 312.5 MHz clocks with sub-1 ps RMS jitter. IC Role / Device Role / Timing Role: Any-frequency synthesizer generating exact IEEE 802.3-compliant frequencies on separate LVDS outputs with independent voltage scaling. Use Value: Achieves <0.7 ps RMS jitter at 156.25 MHz using differential inputs and MultiSynth integer mode, meeting IEEE 802.3bj Annex 83D.
Broadcast Video Sync Generator	FPGA-Based Test Equipment
Use Scenario: SMPTE ST 2082-1 (12G-SDI) video processing platform requiring genlock-capable 27 MHz, 74.25 MHz, and 148.5 MHz clocks with <±100 ps inter-channel skew. IC Role / Device Role / Timing Role: Configurable quad clock source delivering three precisely phased outputs plus spare for future expansion or redundancy. Use Value: Uses programmable initial phase offset (±45 ns) and <20 ps step resolution to align outputs to external genlock reference within 50 ps.	Use Scenario: Automated test equipment with FPGA fabric requiring multiple asynchronous clocks (e.g., 100 MHz AXI, 200 MHz ADC sampling, 400 MHz DDR interface) from a single reference. IC Role / Device Role / Timing Role: Frequency translator and buffer combining external 25 MHz crystal input with independent MultiSynth outputs for heterogeneous clock domains. Use Value: Enables deterministic clock domain crossing via synchronized phase relationships and eliminates need for external PLL ICs or discrete buffers.

PCIe Gen 4 Switch Timing

Ethernet Switch Clocking

Use Scenario: High-density 1U switch chassis requiring synchronized 100 MHz reference clocks for multiple PCIe Gen 4 root complexes and endpoints.

IC Role / Device Role / Timing Role: Quad clock generator providing four independent, low-jitter 100 MHz HCSL clocks compliant with PCIe Gen 4 Common Clock and SRNS specifications.

Use Value: Eliminates four discrete oscillators; enables board-level jitter margin optimization via per-output phase alignment and SSC control.

Use Scenario: 10 GbE/25 GbE line card with multi-port PHYs needing precise 156.25 MHz and 312.5 MHz clocks with sub-1 ps RMS jitter.

IC Role / Device Role / Timing Role: Any-frequency synthesizer generating exact IEEE 802.3-compliant frequencies on separate LVDS outputs with independent voltage scaling.

Use Value: Achieves <0.7 ps RMS jitter at 156.25 MHz using differential inputs and MultiSynth integer mode, meeting IEEE 802.3bj Annex 83D.

Broadcast Video Sync Generator

FPGA-Based Test Equipment

Use Scenario: SMPTE ST 2082-1 (12G-SDI) video processing platform requiring genlock-capable 27 MHz, 74.25 MHz, and 148.5 MHz clocks with <±100 ps inter-channel skew.

IC Role / Device Role / Timing Role: Configurable quad clock source delivering three precisely phased outputs plus spare for future expansion or redundancy.

Use Value: Uses programmable initial phase offset (±45 ns) and <20 ps step resolution to align outputs to external genlock reference within 50 ps.

Use Scenario: Automated test equipment with FPGA fabric requiring multiple asynchronous clocks (e.g., 100 MHz AXI, 200 MHz ADC sampling, 400 MHz DDR interface) from a single reference.

IC Role / Device Role / Timing Role: Frequency translator and buffer combining external 25 MHz crystal input with independent MultiSynth outputs for heterogeneous clock domains.

Use Value: Enables deterministic clock domain crossing via synchronized phase relationships and eliminates need for external PLL ICs or discrete buffers.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D06989-GM	Higher integration: 8 outputs, integrated crystal, lower jitter (0.35 ps RMS), supports JESD204B deterministic latency	Targeted at JESD204B SerDes, radar, and high-end data converters where deterministic delay matters	Select when >4 outputs, ultra-low jitter, or crystal-integrated solution is required; not drop-in compatible due to different pinout and register map
ICS853S01AGI-01LFT	Fixed-function 4-output LVDS generator; no I²C programming; 1.5 ps RMS jitter; 0.1–700 MHz range	Cost-sensitive, high-volume applications with static clock trees and no dynamic reconfiguration needs	Choose for simpler designs where frequency flexibility and software control are unnecessary; requires PCB redesign due to 32-QFN vs. 24-QFN footprint

Compared with Si5332A-D06989-GM and ICS853S01AGI-01LFT, the SI5338C-B04461-GM offers optimal balance of programmability, jitter performance, and pin-count efficiency for PCIe, Ethernet, and broadcast systems requiring field-upgradable timing configurations without layout changes.

Availability

SI5338C-B04461-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, 10/25 GbE line cards, and broadcast video sync generation requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5338C-B04461-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The Si5338 product line delivers highly configurable, low-jitter clock generation for high-speed serial interfaces-including PCIe, Ethernet, Fibre Channel, and broadcast video-enabling system architects to consolidate timing functions and reduce BOM count.

FAQ

What is the maximum output frequency supported by SI5338C-B04461-GM in LVPECL mode?

The SI5338C-B04461-GM supports up to 710 MHz in LVPECL mode when configured per Skyworks' Table 6 specifications. This applies to individual outputs; simultaneous operation above 350 MHz is limited to two unique frequencies (Fvco/4 and Fvco/6) due to VCO constraints. The device maintains 0.7 ps RMS jitter at 100 MHz and meets PCIe Gen 4 jitter requirements across its full LVPECL range.

Does SI5338C-B04461-GM support spread-spectrum clocking (SSC) on all four outputs simultaneously?

Yes, SI5338C-B04461-GM supports independent spread-spectrum modulation on any or all four outputs. Each output can be configured with unique SSC parameters: spread magnitude (0.5–5.0%), modulation rate (33–63 kHz), and center frequency (5–350 MHz). SSC is implemented digitally in the MultiSynth stage and does not require external components, preserving jitter performance while reducing EMI.

Can SI5338C-B04461-GM operate with a 25 MHz crystal input?

No-SI5338C-B04461-GM supports external crystals only in the 8–30 MHz range, and 25 MHz falls within that range. However, crystal operation requires specific load capacitance matching (17–19 pF recommended) and register configuration per AN360. For 25 MHz reference, direct CMOS or differential input is also supported and often preferred for lower jitter and simplified layout.

How is phase alignment managed across the four output pairs of SI5338C-B04461-GM?

SI5338C-B04461-GM provides per-output programmable initial phase offset (±45 ns range) with <20 ps step resolution, enabling precise inter-output skew control. Phase relationships are maintained across power cycles when stored in OTP memory. For dynamic realignment, pin-controlled phase increment/decrement updates occur in ≤667 ns (for outputs >18 MHz), allowing closed-loop timing calibration without interrupting clock signals.

Is SI5338C-B04461-GM pin-compatible with other Si5338 variants such as SI5338A or SI5338B?

Yes-SI5338C-B04461-GM shares the identical 24-QFN package, pinout, and electrical interface with all Si5338-A/B/C/D variants. Differences reside in factory-programmed OTP content (e.g., default frequencies, output formats, and I²C addresses), not hardware. Users can reprogram SI5338C-B04461-GM via I²C using ClockBuilder Pro to match configurations of other Si5338 variants.

SI5338C-B04461-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338C-B04461-GM FAQ

1.How can I place an order for SI5338C-B04461-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338C-B04461-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338C-B04461-GM reliable?

The price and inventory of SI5338C-B04461-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338C-B04461-GM is usually 5 days.

3.What payment methods are accepted for SI5338C-B04461-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338C-B04461-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338C-B04461-GM?

SI5338C-B04461-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338C-B04461-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338C-B04461-GM?

For technical support, including SI5338C-B04461-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338C-B04461-GM requirements.

6.How does Aetrix verify that SI5338C-B04461-GM is sourced from the original manufacturer or authorized distributors?

All SI5338C-B04461-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338C-B04461-GM meets industry standards.

7.What is the process for return or replacement of SI5338C-B04461-GM?

All SI5338C-B04461-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338C-B04461-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338C-B04461-GM part is unused and in its original packaging.

Return procedure for SI5338C-B04461-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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