Skyworks Solutions Inc. SI5338C-B05034-GMR

Overview

SI5338C-B05034-GMR from Skyworks Solutions is a quad-output, I²C-programmable clock generator with MultiSynth™ frequency synthesis. It delivers four independent, zero-ppm-accurate output clocks (up to 710 MHz LVPECL/LVDS, 350 MHz SSTL/HSTL, 250 MHz HCSL, or 200 MHz CMOS) from a single 1.8/2.5/3.3 V core supply, in a 4 × 4 mm 24-QFN package. It serves as a PCIe Gen 1–4 common-clock source and replaces multiple crystal oscillators in FPGA/processor timing systems.

For engineers reviewing the SI5338C-B05034-GMR datasheet, SI5338C-B05034-GMR pinout, SI5338C-B05034-GMR application, or SI5338C-B05034-GMR equivalent, key selection criteria include its 0.7 ps RMS jitter (GbE), PCIe Gen 4 SRNS compliance, independent per-output voltage control (1.5–3.3 V), I²C/SMBus programmability, and flexible input support (8–30 MHz crystal, 5–710 MHz differential).

Technical Context

The SI5338C-B05034-GMR implements a two-stage PLL architecture: a high-stability reference PLL (Stage 1) locks to an external crystal or clock input, followed by four independent MultiSynth™ fractional-N synthesizers (Stage 2) generating each output. Each synthesizer supports integer/fractional mode, programmable phase offset (±45 ns), and glitchless frequency increment/decrement in 1 ppm steps.

Its output stage provides configurable drive formats (LVPECL, LVDS, HCSL, CML, CMOS, SSTL, HSTL) with independent VDDO supplies per driver bank, enabling mixed-signal interface compatibility. The device includes loss-of-lock and loss-of-signal alarms, external feedback for zero-delay operation, and spread-spectrum clocking (0.5–5.0% spread, 33–63 kHz modulation) on any output.

Key Specifications

Pinout & Package

SI5338C-B05034-GMR is housed in a 4 × 4 mm, 24-pin QFN package with exposed thermal pad. Pin assignments are fixed per the Si5338 family: six input pins (IN1–IN6), eight clock output terminals (CLK0A/B through CLK3A/B), four VDDO supplies (VDDO0–VDDO3), three power rails (VDD, GND, RSVD_GND), two I²C lines (SCL, SDA), one interrupt (INTR), and one reserved ground.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output clock generator applications.

Compared with Si5332A-D05034-GM and ICS8430I-01T, SI5338C-B05034-GMR offers optimal balance of field-programmability, PCIe Gen 4 readiness, and industrial temperature support in a compact 24-QFN, making it ideal for new FPGA, switch, and telecom designs requiring post-silicon timing optimization.

Availability

SI5338C-B05034-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, FPGA transceiver clocking, and broadcast video synchronization requiring stable component supply, long-term lifecycle assurance, and full traceability.

Supply support for SI5338C-B05034-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 product line was designed as a programmable, low-jitter clock generator family targeting high-speed serial interfaces-including PCIe, Ethernet, Fibre Channel, and broadcast video-where precise, flexible, and reliable timing is critical to system interoperability and signal integrity.

FAQ

What is the maximum output frequency supported by the SI5338C-B05034-GMR in LVPECL format?

The SI5338C-B05034-GMR supports up to 710 MHz in LVPECL format, as verified in Table 6 of the official Skyworks datasheet Rev. 1.6. This capability applies when operating within specified supply (VDDO ≥ 2.5 V) and thermal conditions (TA ≤ +85 °C), and is enabled by the device's MultiSynth™ synthesizer architecture optimized for high-frequency differential outputs.

Does the SI5338C-B05034-GMR support PCIe Gen 4 Separate Reference No Spread (SRNS) compliance?

Yes, the SI5338C-B05034-GMR meets PCIe Gen 4 SRNS jitter requirements with ≤0.32 ps RMS (typical) when configured with a PLL bandwidth of 2–4 MHz and CDR = 10 MHz, as documented in Table 12 of the Skyworks datasheet Rev. 1.6. This compliance is validated using the Skyworks PCIe Clock Jitter Tool and Intel Clock Jitter Tool v1.6.4.

Can the SI5338C-B05034-GMR generate four different output frequencies simultaneously?

Yes, the SI5338C-B05034-GMR synthesizes four independent output frequencies simultaneously using its four dedicated MultiSynth™ engines. Each output (CLK0–CLK3) can be programmed to any frequency within its supported range (e.g., 100 MHz, 156.25 MHz, 250 MHz, and 491.52 MHz), with zero ppm accuracy and independent format/voltage settings-confirmed in the Functional Block Diagram and Section 3.3 of the datasheet.

What reference inputs does the SI5338C-B05034-GMR accept?

The SI5338C-B05034-GMR accepts multiple reference sources: an 8–30 MHz fundamental-mode crystal (connected to IN1/IN2), a 5–200 MHz CMOS clock (IN3 or IN4), a 5–350 MHz SSTL/HSTL clock (IN3 or IN4), or a 5–710 MHz differential clock (IN1/IN2 or IN5/IN6). All input configurations are explicitly listed in the "Flexible input reference" feature section and Table 6 of the datasheet.

Is the SI5338C-B05034-GMR pin-compatible with other Si5338 variants?

Yes, all Si5338 variants-including SI5338C-B05034-GMR-are pin-compatible within the 24-QFN package footprint, sharing identical pin assignments, power domains, and I²C interface mapping. This compatibility is confirmed in Section 8 ("Device Pinout by Part Number") and Figure 1 of the Skyworks Si5338 datasheet Rev. 1.6, enabling hardware reuse across frequency and configuration variants.