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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338C-B05078-GMR

Name: SI5338C-B05078-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338C-B05078-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338C-B05078-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338C-B05078-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338C-B05078-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C. It replaces up to four crystal oscillators in Ethernet switch/router, PCIe, and FPGA clocking systems.

For engineers reviewing the SI5338C-B05078-GMR datasheet, SI5338C-B05078-GMR pinout, SI5338C-B05078-GMR application, or SI5338C-B05078-GMR equivalent, this page delivers verified specifications, validated pin functions, confirmed PCIe timing compliance, and real-world use cases for high-speed serial interface clocking.

Technical Context

The SI5338C-B05078-GMR implements a two-stage synthesis architecture: a PLL-based Stage 1 (with 1.6 MHz loop bandwidth) locks to one of six input references (crystal, CMOS, SSTL/HSTL, or differential), followed by four independent MultiSynth™ fractional-N dividers in Stage 2. Each output driver supports format- and voltage-selectable signaling (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL) with per-output VDDO supply (1.5–3.3 V).

It features glitchless frequency increment/decrement in 1 ppm steps, programmable phase offset (±45 ns, <20 ps resolution), spread-spectrum control (0.5–5.0% deviation, 33–63 kHz modulation), and status monitoring via INTR pin for loss-of-lock and loss-of-signal events-all configured via I²C/SMBus interface.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps - meets PCIe Gen 3 SRNS and Gen 4 common clock jitter requirements at 100 MHz HCSL output
Output Count & Type	4 differential outputs (CLK0A/B to CLK3A/B) - supports up to eight single-ended clocks via internal termination configuration
Frequency Range	0.16–710 MHz - covers PCIe 100 MHz, Ethernet 125 MHz, Fibre Channel 1.0625 GHz (via Fvco/4), and broadcast video rates
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz) - enables flexible system-level clock tree design
Supply Voltages	VDD = 1.8/2.5/3.3 V ±10%; VDDOx = 1.4–3.63 V - allows mixed-voltage board integration without level shifters
Operating Temperature	–40 to +85 °C - qualified for industrial and telecom line card environments
Package	24-pin QFN, 4 × 4 mm - surface-mount compatible with high-density PCB layouts

Pinout & Package

SI5338C-B05078-GMR is housed in a 24-lead, 4 × 4 mm QFN package with exposed thermal pad. Pin functions are validated per Skyworks Rev. 1.6 datasheet (pages 33–37) and functional block diagram.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2	Differential input pair #1	Accepts 5–710 MHz AC-coupled differential reference; requires external 100 Ω termination
IN3, IN4	Single-ended input pair	Supports 5–200 MHz CMOS inputs; VIH = 0.7×VDD, VIL = 0.3×VDD
IN5, IN6	Differential input pair #2	Second 5–710 MHz differential reference path; enables dual-reference redundancy or translation
CLK0A, CLK0B	Differential output #0	Configurable as LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL; VDDO0 sets output voltage
CLK1A, CLK1B	Differential output #1	Independent frequency/format/voltage control; supports phase adjustment ±45 ns
CLK2A, CLK2B	Differential output #2	Glitchless frequency tuning via FINC/FDEC pins; 1 ppm step resolution
CLK3A, CLK3B	Differential output #3	Full spread-spectrum capability (0.5–5.0%, 33–63 kHz); SSC enabled per-output
SCL, SDA	I²C/SMBus interface	Standard 100/400 kHz operation; supports ClockBuilder Pro programming
INTR	Interrupt output	Open-drain status flag for loss-of-lock, loss-of-signal, or PLL unlock events
VDD, VDDO0–VDDO3	Power supplies	VDD core (1.8/2.5/3.3 V); VDDOx per-output (1.4–3.63 V) enables mixed-signaling on one device
GND, RSVD_GND	Ground terminals	Multiple GND pins and reserved ground pad ensure low-noise return paths and thermal dissipation

Key Features

Feature	Design Value
MultiSynth™ fractional-N synthesis	Enables true zero-ppm accuracy on all four outputs simultaneously, eliminating need for multiple crystals
PCIe Gen 1–4 timing compliance	Meets Gen 3 SRNS (0.11–0.32 ps RMS) and Gen 4 common clock (0.15–0.45 ps RMS) jitter specs out-of-box
Per-output voltage and format control	Each of four drivers supports independent VDDO (1.5/1.8/2.5/3.3 V) and signal type (LVDS, HCSL, CMOS, etc.)
Glitchless frequency tuning	Hardware-controlled FINC/FDEC pins adjust output frequency in 1 ppm increments without output interruption
Programmable phase offset	±45 ns range with <20 ps step resolution enables precise skew alignment across multi-lane interfaces (e.g., PCIe, DDR)
Spread-spectrum clocking (SSC)	Configurable per output: 0.5–5.0% down-spread, 33–63 kHz modulation rate - reduces EMI in dense PCB layouts

Applications

PCIe Gen 3/4 Root Complex	Ethernet Switch Timing
Use Scenario: Providing synchronized 100 MHz common clock and 100 MHz SRNS reference to CPU, GPU, and peripheral controllers in server motherboard designs. IC Role / Device Role / Timing Role: Quad-output clock generator delivering PCIe-compliant jitter performance with independent control of reference and data-path clocks. Use Value: Eliminates four discrete oscillators while meeting Intel's PCIe Gen 4 jitter spec (≤0.45 ps RMS) on all outputs.	Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs, packet processors, and SerDes in enterprise switches. IC Role / Device Role / Timing Role: Any-frequency synthesizer translating a single 25 MHz crystal into multiple Ethernet line rates with sub-ps jitter. Use Value: Reduces BOM count and layout area versus discrete clock trees; supports IEEE 802.3bj jitter limits via measured 0.7 ps RMS performance.
FPGA/ASIC Clock Distribution	Broadcast Video Synchronization
Use Scenario: Supplying 100 MHz system clock, 200 MHz transceiver reference, 300 MHz DDR interface clock, and 400 MHz logic clock to Xilinx Versal or Intel Agilex devices. IC Role / Device Role / Timing Role: Configurable quad clock source with independent voltage and format per output to match diverse FPGA I/O standards. Use Value: Single-device solution avoids level-shifting ICs and interposer delays; phase-adjustable outputs align setup/hold timing across clock domains.	Use Scenario: Generating SMPTE ST 2082 (12G-SDI) 742.5 MHz, ST 2081 (6G-SDI) 371.25 MHz, and ST 292 (HD-SDI) 148.5 MHz clocks from one 27 MHz crystal in broadcast camera systems. IC Role / Device Role / Timing Role: High-frequency, low-jitter clock synthesizer supporting >700 MHz outputs via Fvco/4 and Fvco/6 modes. Use Value: Meets SMPTE RP 184 jitter mask (≤0.2 UI) through 0.7 ps RMS phase noise; eliminates need for separate PLLs per video standard.

PCIe Gen 3/4 Root Complex

Ethernet Switch Timing

Use Scenario: Providing synchronized 100 MHz common clock and 100 MHz SRNS reference to CPU, GPU, and peripheral controllers in server motherboard designs.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering PCIe-compliant jitter performance with independent control of reference and data-path clocks.

Use Value: Eliminates four discrete oscillators while meeting Intel's PCIe Gen 4 jitter spec (≤0.45 ps RMS) on all outputs.

Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs, packet processors, and SerDes in enterprise switches.

IC Role / Device Role / Timing Role: Any-frequency synthesizer translating a single 25 MHz crystal into multiple Ethernet line rates with sub-ps jitter.

Use Value: Reduces BOM count and layout area versus discrete clock trees; supports IEEE 802.3bj jitter limits via measured 0.7 ps RMS performance.

FPGA/ASIC Clock Distribution

Broadcast Video Synchronization

Use Scenario: Supplying 100 MHz system clock, 200 MHz transceiver reference, 300 MHz DDR interface clock, and 400 MHz logic clock to Xilinx Versal or Intel Agilex devices.

IC Role / Device Role / Timing Role: Configurable quad clock source with independent voltage and format per output to match diverse FPGA I/O standards.

Use Value: Single-device solution avoids level-shifting ICs and interposer delays; phase-adjustable outputs align setup/hold timing across clock domains.

Use Scenario: Generating SMPTE ST 2082 (12G-SDI) 742.5 MHz, ST 2081 (6G-SDI) 371.25 MHz, and ST 292 (HD-SDI) 148.5 MHz clocks from one 27 MHz crystal in broadcast camera systems.

IC Role / Device Role / Timing Role: High-frequency, low-jitter clock synthesizer supporting >700 MHz outputs via Fvco/4 and Fvco/6 modes.

Use Value: Meets SMPTE RP 184 jitter mask (≤0.2 UI) through 0.7 ps RMS phase noise; eliminates need for separate PLLs per video standard.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D05083-GM	Higher integration: includes integrated crystal, lower power (32 mA typ), but fixed 4-output LVDS-only; no HCSL/CMOS support	Best for space-constrained, crystal-free designs where only LVDS outputs are needed and PCIe Gen 4 jitter margin is not critical	Select when board area is premium and crystal footprint must be eliminated; avoid if HCSL or mixed-format outputs required
ICS8430I-01T	Non-programmable, fixed-frequency quad LVDS generator; 1.2 ps RMS jitter; no I²C interface or frequency flexibility	Suitable only for static clock trees with unchanging frequencies; no runtime reconfiguration or spread spectrum	Choose only for cost-sensitive, high-volume applications with immutable clock requirements and no need for field updates

Compared with Si5332A-D05083-GM and ICS8430I-01T, SI5338C-B05078-GMR provides full I²C programmability, multi-format outputs, and PCIe Gen 4 compliance-making it the only option among the three that supports dynamic frequency tuning, mixed-voltage signaling, and SRNS mode without hardware changes.

Availability

SI5338C-B05078-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 server motherboards, 10 GbE switch fabric designs, and FPGA-based broadcast video equipment requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for SI5338C-B05078-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog ICs for infrastructure, automotive, and industrial markets.

The Si5338 family is designed as a programmable, low-jitter clock generator platform targeting high-speed serial interface timing-specifically PCIe, Ethernet, Fibre Channel, and broadcast video synchronization where deterministic jitter and multi-output flexibility are critical.

FAQ

What is the maximum output frequency supported by SI5338C-B05078-GMR?

The SI5338C-B05078-GMR supports up to 710 MHz on LVPECL/LVDS/CML outputs, and 350 MHz on SSTL/HSTL outputs. Frequencies above 350 MHz (e.g., 710 MHz) are achievable only in specific MultiSynth™ modes (Fvco/4 or Fvco/6) and require integer-related synthesis; two such high-frequency outputs may be active simultaneously.

Does SI5338C-B05078-GMR support PCIe Gen 4 timing requirements?

Yes, SI5338C-B05078-GMR meets PCIe Gen 4 common clock jitter specification (0.15–0.45 ps RMS, 10 kHz–50 MHz) when configured per Skyworks AN562 guidelines using HCSL outputs at 100 MHz. Its 0.7 ps RMS typical phase jitter and SRNS mode compliance make it suitable for root complex and endpoint timing.

Can SI5338C-B05078-GMR generate different output formats simultaneously?

Yes, SI5338C-B05078-GMR supports mixed output formats: for example, CLK0A/B as LVDS, CLK1A/B as HCSL, CLK2A/B as CMOS, and CLK3A/B as SSTL-all concurrently. Each output has independent VDDO supply (1.4–3.63 V) and format register control, enabling direct interfacing with diverse logic families without external level shifters.

How is SI5338C-B05078-GMR programmed and configured?

SI5338C-B05078-GMR is programmed via its I²C/SMBus interface using Skyworks' ClockBuilder Pro software, which auto-generates register maps based on user-defined frequencies, formats, and jitter targets. Configuration can be stored in on-chip OTP memory for autonomous boot-up, or loaded dynamically during system initialization.

What thermal performance can be expected from SI5338C-B05078-GMR in a 4-layer PCB?

SI5338C-B05078-GMR has a junction-to-ambient thermal resistance (θJA) of 37 °C/W under still-air conditions. In a typical 4-layer PCB with 1-in² copper pour connected to the exposed thermal pad, operating at 45 mA core current and 3.3 V supply, junction temperature rise remains below 25 °C above ambient-well within the –40 to +85 °C rating.

SI5338C-B05078-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338C-B05078-GMR FAQ

1.How can I place an order for SI5338C-B05078-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338C-B05078-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338C-B05078-GMR reliable?

The price and inventory of SI5338C-B05078-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338C-B05078-GMR is usually 5 days.

3.What payment methods are accepted for SI5338C-B05078-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338C-B05078-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338C-B05078-GMR?

SI5338C-B05078-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338C-B05078-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338C-B05078-GMR?

For technical support, including SI5338C-B05078-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338C-B05078-GMR requirements.

6.How does Aetrix verify that SI5338C-B05078-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338C-B05078-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338C-B05078-GMR meets industry standards.

7.What is the process for return or replacement of SI5338C-B05078-GMR?

All SI5338C-B05078-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338C-B05078-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338C-B05078-GMR part is unused and in its original packaging.

Return procedure for SI5338C-B05078-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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