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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338C-B05153-GMR

Name: SI5338C-B05153-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338C-B05153-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338C-B05153-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338C-B05153-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

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Product details

Overview

SI5338C-B05153-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338C-B05153-GMR datasheet, SI5338C-B05153-GMR pinout, SI5338C-B05153-GMR application, or SI5338C-B05153-GMR equivalent, key selection criteria include output format flexibility (LVPECL/LVDS/HCSL/CMOS/SSTL), independent per-output voltage (1.5–3.3 V), any-frequency synthesis (0.16–710 MHz), spread-spectrum capability (0.5–5.0% down-spread), and I²C/SMBus programmability with ClockBuilder Pro support.

Technical Context

The SI5338C-B05153-GMR implements a two-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesizers, each driving a configurable output buffer. Its input supports eight reference sources - external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) - enabling flexible system clock tree design.

Each output driver supports independent frequency, format, voltage, phase offset (±45 ns, <20 ps step), and spread-spectrum modulation (33–63 kHz rate, 0.5–5.0% deviation). The device operates from a single 1.8/2.5/3.3 V core supply and delivers 45 mA typical core current at full load, with loss-of-lock and loss-of-signal alarms for system monitoring.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typ (12 kHz–20 MHz); meets PCIe Gen 3 SRNS and Gen 4 common clock jitter requirements
Output Frequency Range	0.16–710 MHz per channel; supports LVPECL/LVDS (≤710 MHz), HCSL (≤250 MHz), CMOS (≤200 MHz), SSTL/HSTL (≤350 MHz)
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Supply Voltage	Core: 1.8/2.5/3.3 V ±10%; Output buffers: independently configurable 1.4–3.63 V per driver
Operating Temperature	–40 to +85 °C; qualified for industrial and telecom line card environments
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch; RoHS-compliant, GMR suffix indicates green/reduced-halogen
Interface	I²C/SMBus-compatible serial interface; supports ClockBuilder Pro configuration and in-system reprogramming

Pinout & Package

SI5338C-B05153-GMR is housed in a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed per the Si5338 family and validated for this variant.

Pin/Terminal	Circuit Role	Design Meaning
IN1/IN2, IN5/IN6	Differential reference inputs	Accept 5–710 MHz AC-coupled differential clocks; require external 100 Ω termination
IN3/IN4	Single-ended reference inputs	Support CMOS/SSTL/HSTL inputs (5–350 MHz); internally biased, no external pull-up required
CLK0A/CLK0B–CLK3A/CLK3B	Differential clock outputs	Four independent pairs; each configurable as LVPECL, LVDS, HCSL, CML, or SSTL
VDDO0–VDDO3	Output buffer supplies	Independent 1.4–3.63 V per output pair; enables mixed-voltage clock distribution
SCL/SDA	I²C configuration interface	Standard open-drain I²C bus; supports 100 kHz/400 kHz modes and SMBus timeout
INTR	Interrupt output	Active-low open-drain status flag for loss-of-lock, loss-of-signal, or programming completion

Key Features

Feature	Design Value
Any-frequency synthesis	Four independent MultiSynth™ engines deliver true zero-ppm accuracy on all outputs without external crystals
PCIe Gen 3 SRNS & Gen 4 compliance	Meets 0.11–0.45 ps RMS jitter requirements under specified PLL bandwidth and CDR conditions
Independent per-output voltage control	Each of four output banks powered separately (1.5/1.8/2.5/3.3 V), enabling direct interface to mixed-voltage FPGAs and ASICs
Glitchless frequency tuning	Hardware-supported frequency increment/decrement in 1 ppm steps with sub-1 µs update time
Programmable spread spectrum	Configurable down-spread (0.5–5.0%) and modulation rate (33–63 kHz) on any output to reduce EMI
External feedback mode	Enables zero-delay clock distribution by routing CLKOUT back to FB input, eliminating propagation delay

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch Clocking
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switch ICs in a data center fabric. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four low-jitter, phase-aligned HCSL clocks with independent SSC control per port. Use Value: Enables simultaneous compliance with PCIe Gen 4 common clock jitter spec (≤0.45 ps RMS) across all switch lanes while reducing system-level EMI via per-port spread spectrum.	Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10/25 GbE PHYs and MACs in a multi-rate Ethernet switch ASIC. IC Role / Device Role / Timing Role: Any-frequency synthesizer producing exact IEEE 802.3-compliant frequencies from a single 25 MHz crystal reference. Use Value: Eliminates need for multiple discrete oscillators; achieves <0.7 ps RMS jitter on all outputs, meeting IEEE 802.3bj Annex 83F random jitter limits.
Broadcast Video Synchronization	FPGA Processor Clocking
Use Scenario: Distributing frame-locked 27 MHz, 74.25 MHz, and 148.5 MHz pixel clocks across SDI transmitter/receiver modules in a 4K video router. IC Role / Device Role / Timing Role: Low-phase-noise clock generator with programmable initial phase offset (±45 ns, <20 ps resolution) for precise inter-channel skew alignment. Use Value: Ensures sub-100 ps output-to-output skew between video clock domains, preventing frame misalignment and color timing errors.	Use Scenario: Supplying 500 MHz system clock, 250 MHz DDR4 memory clock, and 100 MHz peripheral clock to a Xilinx Versal ACAP with mixed-voltage I/O banks. IC Role / Device Role / Timing Role: Configurable quad clock source with independent VDDO per output bank (1.8 V for DDR4, 3.3 V for peripherals, 1.0 V logic domain). Use Value: Delivers rail-specific voltage levels directly-no level shifters required-reducing BOM count and PCB area while maintaining <10 ps cycle-cycle jitter.

PCIe Gen 4 Switch Timing

Ethernet Switch Clocking

Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switch ICs in a data center fabric.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering four low-jitter, phase-aligned HCSL clocks with independent SSC control per port.

Use Value: Enables simultaneous compliance with PCIe Gen 4 common clock jitter spec (≤0.45 ps RMS) across all switch lanes while reducing system-level EMI via per-port spread spectrum.

Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10/25 GbE PHYs and MACs in a multi-rate Ethernet switch ASIC.

IC Role / Device Role / Timing Role: Any-frequency synthesizer producing exact IEEE 802.3-compliant frequencies from a single 25 MHz crystal reference.

Use Value: Eliminates need for multiple discrete oscillators; achieves <0.7 ps RMS jitter on all outputs, meeting IEEE 802.3bj Annex 83F random jitter limits.

Broadcast Video Synchronization

FPGA Processor Clocking

Use Scenario: Distributing frame-locked 27 MHz, 74.25 MHz, and 148.5 MHz pixel clocks across SDI transmitter/receiver modules in a 4K video router.

IC Role / Device Role / Timing Role: Low-phase-noise clock generator with programmable initial phase offset (±45 ns, <20 ps resolution) for precise inter-channel skew alignment.

Use Value: Ensures sub-100 ps output-to-output skew between video clock domains, preventing frame misalignment and color timing errors.

Use Scenario: Supplying 500 MHz system clock, 250 MHz DDR4 memory clock, and 100 MHz peripheral clock to a Xilinx Versal ACAP with mixed-voltage I/O banks.

IC Role / Device Role / Timing Role: Configurable quad clock source with independent VDDO per output bank (1.8 V for DDR4, 3.3 V for peripherals, 1.0 V logic domain).

Use Value: Delivers rail-specific voltage levels directly-no level shifters required-reducing BOM count and PCB area while maintaining <10 ps cycle-cycle jitter.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D05153-GM	Higher integration: includes integrated crystal, lower jitter (0.35 ps RMS), supports up to 10 outputs, but larger 32-QFN package	Preferred for space-constrained designs requiring ultra-low jitter and crystal integration; not drop-in compatible due to pin count and footprint	Select when crystal integration and sub-0.4 ps jitter are mandatory; requires layout revision
ICS8430I-01T	Fixed-frequency, non-programmable quad LVDS clock generator; 1.2 ps RMS jitter; 3.3 V only; no I²C interface or spread spectrum	Suitable only for static clock trees where frequencies never change; lacks dynamic reconfiguration and EMI reduction features	Choose only for cost-sensitive, fixed-frequency applications where programmability and jitter margin are secondary

Compared with Si5332A-D05153-GM and ICS8430I-01T, the SI5338C-B05153-GMR uniquely balances field-programmability, PCIe Gen 4 compliance, and compact 24-QFN packaging-making it optimal for upgradeable, multi-standard timing in networking and compute platforms where layout reuse and firmware-driven frequency agility are critical.

Availability

SI5338C-B05153-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switch clocking, broadcast video synchronization, and FPGA processor clocking requiring stable component supply across industrial temperature ranges and long production lifecycles.

Supply support for SI5338C-B05153-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The Si5338 product line was designed specifically for high-performance, software-configurable clock generation in multi-protocol systems-enabling consolidation of discrete oscillators and simplifying timing architecture in PCIe, Ethernet, and broadcast equipment.

FAQ

What is the maximum output frequency supported by SI5338C-B05153-GMR in LVPECL mode?

The SI5338C-B05153-GMR supports LVPECL output frequencies up to 710 MHz, as confirmed in Table 6 of the datasheet. This applies when using differential outputs with appropriate termination and within the device's specified operating conditions (–40 to +85 °C, valid supply voltages). Frequencies above 350 MHz are limited to two unique values simultaneously (Fvco/4 and Fvco/6) due to internal VCO constraints.

Does SI5338C-B05153-GMR support PCIe Gen 4 Common Clock compliance?

Yes, the SI5338C-B05153-GMR meets PCIe Gen 4 Common Clock jitter requirements with ≤0.45 ps RMS (12 kHz–20 MHz) when configured per the recommended PLL bandwidth (2–4 or 2–5 MHz) and CDR frequency (10 MHz), as specified in Table 12. This compliance is validated using the Skyworks PCIe Clock Jitter Tool and Intel Clock Jitter Tool v1.6.4.

Can SI5338C-B05153-GMR generate different output voltages on each of its four output banks?

Yes, SI5338C-B05153-GMR provides independent VDDO supplies (VDDO0–VDDO3) for each output pair, supporting 1.4–3.63 V per bank. This allows concurrent LVDS (2.5 V), HCSL (1.8 V), and CMOS (3.3 V) outputs without external level shifters-enabling direct interface to mixed-voltage FPGAs and ASICs.

Is an external crystal required for SI5338C-B05153-GMR operation?

No, an external crystal is optional. The SI5338C-B05153-GMR accepts multiple reference inputs: external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz). Crystal use is only necessary if no other clean reference clock is available in the system.

How is SI5338C-B05153-GMR programmed and configured in-system?

The SI5338C-B05153-GMR is programmed via its I²C/SMBus-compatible serial interface (SCL/SDA pins), supporting standard 100 kHz and 400 kHz modes. Configuration is simplified using Skyworks' ClockBuilder Pro software, which generates register maps and .c files for embedded initialization. All settings-including frequency, format, voltage, and spread spectrum-are stored in on-chip OTP NVM.

SI5338C-B05153-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338C-B05153-GMR FAQ

1.How can I place an order for SI5338C-B05153-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338C-B05153-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338C-B05153-GMR reliable?

The price and inventory of SI5338C-B05153-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338C-B05153-GMR is usually 5 days.

3.What payment methods are accepted for SI5338C-B05153-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338C-B05153-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338C-B05153-GMR?

SI5338C-B05153-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338C-B05153-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338C-B05153-GMR?

For technical support, including SI5338C-B05153-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338C-B05153-GMR requirements.

6.How does Aetrix verify that SI5338C-B05153-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338C-B05153-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338C-B05153-GMR meets industry standards.

7.What is the process for return or replacement of SI5338C-B05153-GMR?

All SI5338C-B05153-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338C-B05153-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338C-B05153-GMR part is unused and in its original packaging.

Return procedure for SI5338C-B05153-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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