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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338C-B05411-GM

Name: SI5338C-B05411-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338C-B05411-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338C-B05411-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338C-B05411-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338C-B05411-GM from Skyworks Solutions is an I²C-programmable quad clock generator IC with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in FPGA clocking, Ethernet switch timing, and PCIe Gen 4 reference distribution.

For engineers reviewing the SI5338C-B05411-GM datasheet, SI5338C-B05411-GM pinout, SI5338C-B05411-GM application, or SI5338C-B05411-GM equivalent, key selection criteria include its MultiSynth™ fractional-N synthesis architecture, independent output voltage per driver (1.5/1.8/2.5/3.3 V), 0.16–710 MHz frequency range per output, spread-spectrum capability (0.5–5.0% down-spread), and loss-of-lock/loss-of-signal alarm support.

Technical Context

The SI5338C-B05411-GM implements a two-stage synthesis architecture: a high-stability PLL stage (1.6 MHz loop bandwidth) locks to one of six input references (crystal, CMOS, SSTL/HSTL, or differential), followed by four independent MultiSynth™ fractional-N dividers enabling any-frequency generation on each output. Each MultiSynth supports integer or fractional mode with <20 ps programmable phase step resolution and 1 ppm frequency increment/decrement.

Its output stage provides per-driver configurability for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats, with independent VDDO supplies (1.4–3.63 V), selectable slew rate control, and hardware- or I²C-triggered glitchless frequency/phase updates. The device supports external feedback for zero-delay mode and includes dedicated INTR pin for status reporting.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typ (12 kHz–20 MHz); meets PCIe Gen 4 common clock jitter spec (≤0.45 ps RMS)
Output Frequency Range	0.16–710 MHz per channel; supports up to two >350 MHz outputs simultaneously (Fvco/4 & Fvco/6)
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Output Driver Flexibility	Up to 4 differential outputs, 8 single-ended, or mixed; independent VDDO per driver (1.5/1.8/2.5/3.3 V)
Programmability	I²C/SMBus interface; ClockBuilder Pro software support; OTP NVM for factory pre-programming
Operating Temperature	–40 to +85 °C; qualified for industrial and telecom line card environments
Supply Voltage	Core: 1.8/2.5/3.3 V ±10%; Output buffers: 1.4–3.63 V per VDDO rail

Pinout & Package

SI5338C-B05411-GM is housed in a 4 × 4 mm, 24-pin QFN package with exposed thermal pad (RoHS-compliant, lead-free). Pin 1 is top-left corner (IN1), pin 24 is bottom-right (GND), and pin 13 is CLK3A. All power pins (VDD, VDDO0–VDDO3) are distributed for low-noise supply decoupling; IN1/IN2 and IN5/IN6 are differential input pairs; CLK0A/CLK0B through CLK3A/CLK3B are complementary differential output pairs.

Pin/Terminal	Circuit Role	Design Meaning
IN1 / IN2	Differential input pair (primary reference)	Accepts 5–710 MHz AC-coupled differential clock; internal 100 Ω termination enabled
CLK0A / CLK0B	Differential output pair (output 0)	Configurable format (LVPECL/LVDS/HCSL); independent VDDO0 supply
VDDO1 / VDDO2 / VDDO3	Output buffer supply rails	Enable independent voltage setting per output group (1.5/1.8/2.5/3.3 V)
SCL / SDA	I²C serial interface	Supports standard/fast-mode I²C (up to 400 kHz); SMBus-compatible
INTR	Interrupt output	Open-drain status pin asserting loss-of-lock, loss-of-signal, or configuration error

Key Features

Feature	Design Value
MultiSynth™ fractional-N synthesis	Enables true zero-ppm accuracy on all four outputs with independent frequency/phase control
PCIe Gen 3 SRNS & Gen 4 compliance	Meets 0.11–0.45 ps RMS jitter requirements for separate-reference and common-clock architectures
Independent output voltage per driver	Eliminates level-shifting components when interfacing with mixed-voltage FPGAs, ASICs, or SerDes
Hardware-triggered frequency/phase update	Glitchless 1 ppm step adjustments via PINC/FDEC pins; sub-1 ns update latency at >18 MHz
Spread spectrum on any output	Reduces EMI peak emissions by up to 5.0% down-spread at 33–63 kHz modulation rates
External feedback mode	Supports zero-delay clock distribution in synchronous systems with precise phase alignment

Applications

PCIe Gen 4 Reference Clock Distribution	Ethernet Switch Timing (1 GbE/10 GbE)
Use Scenario: Providing synchronized, low-jitter reference clocks to multiple PCIe Gen 4 endpoints and root complexes in server backplanes. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent 100 MHz HCSL clocks with <0.45 ps RMS jitter and matched skew. Use Value: Enables full Gen 4 link training without jitter-induced retraining cycles; eliminates need for four discrete oscillators and associated layout complexity.	Use Scenario: Generating precisely aligned clocks for multi-port Ethernet switches supporting 1 GbE and 10 GbE PHYs with IEEE 1588 PTP timing. IC Role / Device Role / Timing Role: Configurable clock source providing 125 MHz (GbE), 156.25 MHz (10GbE), and 25 MHz (management) outputs from a single crystal reference. Use Value: Reduces BOM count and PCB area vs. discrete clock trees; enables deterministic inter-port skew control for time-sensitive switching applications.
FPGA and ASIC Clocking	Broadcast Video Timing (SMPTE ST 2082/ST 2081)
Use Scenario: Supplying multiple domain-specific clocks (e.g., 300 MHz fabric, 150 MHz DDR, 200 MHz transceiver) to Xilinx Versal or Intel Agilex FPGAs. IC Role / Device Role / Timing Role: Programmable quad clock generator with independent VDDO rails matching FPGA I/O bank voltages (1.8 V, 2.5 V, 3.3 V). Use Value: Eliminates external level shifters and reduces power delivery complexity; supports dynamic frequency scaling via I²C during runtime.	Use Scenario: Delivering SMPTE ST 2082 (12G-SDI) and ST 2081 (24G-SDI) reference clocks (74.25 MHz, 148.5 MHz, 297 MHz) with sub-1 ps jitter to video processing ASICs. IC Role / Device Role / Timing Role: High-precision clock synthesizer generating exact broadcast frequencies from a 25 MHz crystal using MultiSynth™ integer mode. Use Value: Meets SMPTE ST 2082 jitter mask (≤0.3 UI pk-pk) without external jitter cleaners; simplifies compliance testing with factory-programmed configurations.

PCIe Gen 4 Reference Clock Distribution

Ethernet Switch Timing (1 GbE/10 GbE)

Use Scenario: Providing synchronized, low-jitter reference clocks to multiple PCIe Gen 4 endpoints and root complexes in server backplanes.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent 100 MHz HCSL clocks with <0.45 ps RMS jitter and matched skew.

Use Value: Enables full Gen 4 link training without jitter-induced retraining cycles; eliminates need for four discrete oscillators and associated layout complexity.

Use Scenario: Generating precisely aligned clocks for multi-port Ethernet switches supporting 1 GbE and 10 GbE PHYs with IEEE 1588 PTP timing.

IC Role / Device Role / Timing Role: Configurable clock source providing 125 MHz (GbE), 156.25 MHz (10GbE), and 25 MHz (management) outputs from a single crystal reference.

Use Value: Reduces BOM count and PCB area vs. discrete clock trees; enables deterministic inter-port skew control for time-sensitive switching applications.

FPGA and ASIC Clocking

Broadcast Video Timing (SMPTE ST 2082/ST 2081)

Use Scenario: Supplying multiple domain-specific clocks (e.g., 300 MHz fabric, 150 MHz DDR, 200 MHz transceiver) to Xilinx Versal or Intel Agilex FPGAs.

IC Role / Device Role / Timing Role: Programmable quad clock generator with independent VDDO rails matching FPGA I/O bank voltages (1.8 V, 2.5 V, 3.3 V).

Use Value: Eliminates external level shifters and reduces power delivery complexity; supports dynamic frequency scaling via I²C during runtime.

Use Scenario: Delivering SMPTE ST 2082 (12G-SDI) and ST 2081 (24G-SDI) reference clocks (74.25 MHz, 148.5 MHz, 297 MHz) with sub-1 ps jitter to video processing ASICs.

IC Role / Device Role / Timing Role: High-precision clock synthesizer generating exact broadcast frequencies from a 25 MHz crystal using MultiSynth™ integer mode.

Use Value: Meets SMPTE ST 2082 jitter mask (≤0.3 UI pk-pk) without external jitter cleaners; simplifies compliance testing with factory-programmed configurations.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5338A-B-GM	Same pinout and architecture; lacks PCIe Gen 4 SRNS compliance and has higher typical jitter (0.8 ps RMS)	Valid for PCIe Gen 3 and legacy telecom; not suitable for Gen 4 SRNS designs	Select only if Gen 4 SRNS is not required and cost optimization is critical
ICS85411AGI-01LFT	Fixed-frequency quad LVDS generator (no I²C programming); 1.2 ps RMS jitter; no spread spectrum or phase adjustment	Limited to static clock trees; no frequency agility or EMI reduction features	Choose for simple, low-cost clock fanout where programmability is unnecessary

Compared with Si5338A-B-GM and ICS85411AGI-01LFT, the SI5338C-B05411-GM uniquely delivers PCIe Gen 4 SRNS compliance, sub-0.45 ps RMS jitter, and full I²C-based dynamic reconfiguration-making it the only option for next-generation high-speed serial interface timing requiring both precision and flexibility.

Availability

SI5338C-B05411-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 reference distribution, Ethernet switch timing, and FPGA clocking requiring stable component supply, long-term lifecycle assurance, and traceable sourcing for industrial and telecom deployments.

Supply support for SI5338C-B05411-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 family is designed as a highly configurable, low-jitter clock generator platform targeting high-speed serial interface timing-including PCIe, Ethernet, Fibre Channel, and broadcast video-where precise frequency synthesis and flexible output formatting are critical.

FAQ

What is the maximum output frequency supported by SI5338C-B05411-GM?

The SI5338C-B05411-GM supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, 250 MHz on HCSL, and 200 MHz on CMOS. However, only two unique frequencies above 350 MHz can be generated simultaneously (Fvco/4 and Fvco/6), as confirmed in Table 6 of the datasheet.

Does SI5338C-B05411-GM support PCIe Gen 4 Separate Reference No Spread (SRNS) mode?

Yes, SI5338C-B05411-GM is explicitly compliant with PCIe Gen 4 SRNS requirements, delivering ≤0.32 ps RMS jitter (typical) under specified test conditions (PLL BW 2–4 MHz, CDR = 10 MHz), as documented in Table 12 of the datasheet Rev. 1.6.

Can SI5338C-B05411-GM operate with a 25 MHz crystal input?

No-SI5338C-B05411-GM supports crystal inputs only in the 8–30 MHz range (per Tables 8–11), and 25 MHz falls within the 26–30 MHz specification band. It requires proper load capacitance tuning (17–19 pF recommended) and meets rESR ≤75 Ω and drive level ≤100 µW requirements.

How many independent output voltage supplies does SI5338C-B05411-GM provide?

SI5338C-B05411-GM provides four independent output buffer supply rails: VDDO0, VDDO1, VDDO2, and VDDO3. Each can be set to 1.5 V, 1.8 V, 2.5 V, or 3.3 V to match the I/O voltage of connected devices such as FPGAs or SerDes blocks.

Is ClockBuilder Pro software required to configure SI5338C-B05411-GM?

No-ClockBuilder Pro is optional but strongly recommended for intuitive configuration. SI5338C-B05411-GM supports direct I²C register writes per the register map in Section 6 of the datasheet; however, ClockBuilder Pro automates MultiSynth™ divider calculations, validates jitter performance, and generates factory-programmable OTP images.

SI5338C-B05411-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338C-B05411-GM FAQ

1.How can I place an order for SI5338C-B05411-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338C-B05411-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338C-B05411-GM reliable?

The price and inventory of SI5338C-B05411-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338C-B05411-GM is usually 5 days.

3.What payment methods are accepted for SI5338C-B05411-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338C-B05411-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338C-B05411-GM?

SI5338C-B05411-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338C-B05411-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338C-B05411-GM?

For technical support, including SI5338C-B05411-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338C-B05411-GM requirements.

6.How does Aetrix verify that SI5338C-B05411-GM is sourced from the original manufacturer or authorized distributors?

All SI5338C-B05411-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338C-B05411-GM meets industry standards.

7.What is the process for return or replacement of SI5338C-B05411-GM?

All SI5338C-B05411-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338C-B05411-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338C-B05411-GM part is unused and in its original packaging.

Return procedure for SI5338C-B05411-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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