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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338C-B05559-GM

Name: SI5338C-B05559-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338C-B05559-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338C-B05559-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338C-B05559-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338C-B05559-GM from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 and SRNS compliance, and MultiSynth™ frequency synthesis supporting 0.16–710 MHz output ranges across LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338C-B05559-GM datasheet, SI5338C-B05559-GM pinout, SI5338C-B05559-GM application, or SI5338C-B05559-GM equivalent, key selection criteria include PCIe Gen 4 common-clock jitter (0.15–0.45 ps RMS), independent per-output voltage control (1.5/1.8/2.5/3.3 V), 4×4 mm 24-QFN package, I²C/SMBus programmability, and zero-ppm synthesis accuracy across all four outputs.

Technical Context

The SI5338C-B05559-GM implements a two-stage PLL architecture: a high-stability input stage locking to external references (crystal, CMOS, SSTL, or differential inputs up to 710 MHz), followed by four independent MultiSynth™ fractional-N synthesis blocks driving configurable output buffers. Each output supports integer or fractional mode operation with programmable phase offset (±45 ns) and glitchless frequency increment/decrement in 1 ppm steps.

Its functional block includes on-chip OTP NVM for configuration storage, loss-of-lock and loss-of-signal alarms, spread-spectrum control (0.5–5.0% spread, 33–63 kHz modulation), and external feedback mode enabling zero-delay operation. Core supply operates at 1.8/2.5/3.3 V with 45 mA typical current draw, while each output bank (VDDO0–VDDO3) is independently powered.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3/4 SRNS and GbE jitter requirements
Output Frequency Range	0.16–710 MHz per channel; supports LVPECL (≤710 MHz), LVDS (≤350 MHz), HCSL (≤250 MHz), CMOS (≤200 MHz), SSTL/HSTL (≤350 MHz)
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Supply Voltages	Core: 1.8/2.5/3.3 V ±10%; Output banks: independently configurable 1.5/1.8/2.5/3.3 V
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch, exposed thermal pad
Operating Temperature	–40 °C to +85 °C ambient; qualified for industrial and telecom line card environments
I²C Interface	SMBus-compatible, 100/400 kHz standard/fast mode; supports ClockBuilder Pro configuration

Pinout & Package

SI5338C-B05559-GM uses a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed per Skyworks Si5338 family specification and validated for this variant.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential input pairs	Accept AC-coupled differential clocks up to 710 MHz; require external 100 Ω termination
IN3, IN4	Single-ended input pins	Support CMOS/SSTL/HSTL inputs (5–350 MHz); VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A–CLK3B	Differential output pairs (4 channels)	Each pair configurable as LVPECL/LVDS/HCSL/CML; independent format, frequency, and voltage per bank
VDDO0–VDDO3	Output buffer supply rails	Independent 1.5/1.8/2.5/3.3 V supplies per output bank; enable mixed-voltage system interfacing
VDD	Core supply	1.8/2.5/3.3 V core power; PSRR optimized for low-noise clock generation
SCL, SDA	I²C interface	Standard bidirectional SMBus-compatible bus; supports configuration and status readback
INTR	Interrupt output	Open-drain alarm signal indicating loss-of-lock or loss-of-signal events
RSVD_GND	Reserved ground	Internal no-connect; must be tied to GND per layout guidelines

Key Features

Feature	Design Value
MultiSynth™ synthesis	Four independent fractional-N synthesizers enabling true zero-ppm frequency accuracy on all outputs simultaneously
PCIe Gen 4 compliance	Meets Common Clock jitter spec (0.15–0.45 ps RMS) and SRNS requirements without external filtering
Per-output voltage control	Each of four output banks (VDDO0–VDDO3) supports 1.5/1.8/2.5/3.3 V, enabling direct interface to mixed-voltage FPGAs and ASICs
Glitchless frequency tuning	Independent frequency increment/decrement via pin or I²C in 1 ppm steps, with update time ≤667 ns above 18 MHz
Programmable phase offset	±45 ns range per output with <20 ps step resolution, enabling precise skew alignment in multi-lane SerDes systems
Spread spectrum support	Configurable on any output: 0.5–5.0% spread depth, 33–63 kHz modulation rate, improving EMI compliance

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch/Routing
Use Scenario: Providing synchronized reference clocks to multiple PCIe Gen 4 switch ICs in a data center fabric card. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent 100 MHz HCSL clocks with sub-0.45 ps RMS jitter and matched phase alignment. Use Value: Enables full Gen 4 lane compliance without external jitter cleaners; eliminates need for four discrete oscillators and reduces board area by >60%.	Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs and packet processors in enterprise switches. IC Role / Device Role / Timing Role: Programmable frequency translator converting a single 25 MHz crystal into multiple Ethernet-compliant rates with deterministic phase relationships. Use Value: Reduces BOM count and simplifies layout; supports IEEE 802.3bj KR4 and 802.3by CR4 jitter specs via low-additive-phase-jitter buffer mode.
Broadcast Video Timing	FPGA/ASIC Clocking
Use Scenario: Delivering SMPTE ST 2082 (12G-SDI) 297 MHz and ST 2081 (6G-SDI) 148.5 MHz reference clocks with ultra-low jitter to video encoder/decoder SoCs. IC Role / Device Role / Timing Role: High-precision clock synthesizer generating exact broadcast frequencies from a low-cost 27 MHz crystal using integer-mode MultiSynth™. Use Value: Achieves <10 ps pk-pk period jitter required for SMPTE ST 2082 conformance; eliminates crystal inventory for multiple video standards.	Use Scenario: Supplying multiple clock domains (e.g., 100 MHz AXI, 200 MHz DDR, 300 MHz logic) to Xilinx Versal or Intel Agilex FPGAs in adaptive compute acceleration platforms. IC Role / Device Role / Timing Role: Configurable quad clock source with independent voltage rails (1.8 V for I/O, 1.2 V core) and programmable phase offsets for timing closure. Use Value: Enables single-device clock tree for heterogeneous FPGA subsystems; supports dynamic frequency scaling via I²C-controlled increment/decrement.

PCIe Gen 4 Switch Timing

Ethernet Switch/Routing

Use Scenario: Providing synchronized reference clocks to multiple PCIe Gen 4 switch ICs in a data center fabric card.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent 100 MHz HCSL clocks with sub-0.45 ps RMS jitter and matched phase alignment.

Use Value: Enables full Gen 4 lane compliance without external jitter cleaners; eliminates need for four discrete oscillators and reduces board area by >60%.

Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs and packet processors in enterprise switches.

IC Role / Device Role / Timing Role: Programmable frequency translator converting a single 25 MHz crystal into multiple Ethernet-compliant rates with deterministic phase relationships.

Use Value: Reduces BOM count and simplifies layout; supports IEEE 802.3bj KR4 and 802.3by CR4 jitter specs via low-additive-phase-jitter buffer mode.

Broadcast Video Timing

FPGA/ASIC Clocking

Use Scenario: Delivering SMPTE ST 2082 (12G-SDI) 297 MHz and ST 2081 (6G-SDI) 148.5 MHz reference clocks with ultra-low jitter to video encoder/decoder SoCs.

IC Role / Device Role / Timing Role: High-precision clock synthesizer generating exact broadcast frequencies from a low-cost 27 MHz crystal using integer-mode MultiSynth™.

Use Value: Achieves <10 ps pk-pk period jitter required for SMPTE ST 2082 conformance; eliminates crystal inventory for multiple video standards.

Use Scenario: Supplying multiple clock domains (e.g., 100 MHz AXI, 200 MHz DDR, 300 MHz logic) to Xilinx Versal or Intel Agilex FPGAs in adaptive compute acceleration platforms.

IC Role / Device Role / Timing Role: Configurable quad clock source with independent voltage rails (1.8 V for I/O, 1.2 V core) and programmable phase offsets for timing closure.

Use Value: Enables single-device clock tree for heterogeneous FPGA subsystems; supports dynamic frequency scaling via I²C-controlled increment/decrement.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5338A-B05559-GM	Same pinout and register map; differs only in factory-programmed NVM configuration (A vs C variant)	Pre-configured for different default output frequencies and formats; requires reprogramming for identical behavior	Select SI5338C-B05559-GM when factory-loaded configuration matches target system timing requirements out-of-box
LMK04832ISQE/NOPB	Two PLLs (not four independent synthesizers); higher power (120 mA typical); larger 48-QFN package	Optimized for ultra-low-jitter (<0.1 ps) RF and JESD204B applications; lacks per-output voltage control	Choose LMK04832 for sub-0.15 ps RMS jitter-critical ADC/DAC sampling clocks; SI5338C-B05559-GM better suits cost- and space-constrained PCIe/Ethernet systems

Compared with Si5338A-B05559-GM, SI5338C-B05559-GM offers identical hardware but distinct factory firmware; versus LMK04832, it trades absolute jitter floor for smaller size, lower power, and flexible per-output voltage control-making it optimal for multi-protocol serial interface timing where board space and BOM count are constrained.

Availability

SI5338C-B05559-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switching/routing, and broadcast video timing requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for SI5338C-B05559-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs for infrastructure, automotive, and mobile markets.

The Si5338 product line delivers highly configurable, low-jitter clock generation for high-speed serial interfaces-including PCIe, Ethernet, Fibre Channel, and broadcast video-enabling system architects to consolidate timing functions and reduce design complexity.

FAQ

What is the primary function of the SI5338C-B05559-GM in a timing architecture?

The SI5338C-B05559-GM serves as an I²C-programmable quad clock generator that synthesizes up to four independent, zero-ppm-accurate output frequencies from a single reference input. It replaces multiple discrete oscillators in systems requiring PCIe Gen 4, Ethernet, or broadcast video timing, and is implemented in the SI5338C-B05559-GM with MultiSynth™ fractional-N synthesis, per-output voltage control, and spread-spectrum capability.

Does the SI5338C-B05559-GM support PCIe Gen 4 Common Clock compliance?

Yes, the SI5338C-B05559-GM meets PCIe Gen 4 Common Clock jitter specifications with 0.15–0.45 ps RMS (10 kHz–50 MHz) when configured per Skyworks AN562 guidelines. This compliance is verified using the Skyworks PCIe Clock Jitter Tool and applies to HCSL 100 MHz outputs with PLL bandwidth set to 2–4 MHz and CDR at 10 MHz-key parameters implemented in the SI5338C-B05559-GM's factory configuration.

How many output formats does the SI5338C-B05559-GM support, and can they be mixed?

The SI5338C-B05559-GM supports LVPECL, LVDS, HCSL, CML, CMOS, SSTL, and HSTL output formats across its four differential output pairs. All formats can be mixed simultaneously-for example, CLK0A/B as LVDS, CLK1A/B as HCSL, CLK2A/B as CMOS, and CLK3A/B as SSTL-because each output bank (VDDO0–VDDO3) is independently configurable for format, frequency, and supply voltage in the SI5338C-B05559-GM.

What reference inputs are compatible with the SI5338C-B05559-GM?

The SI5338C-B05559-GM accepts external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) reference inputs. Input pins IN1/IN2 and IN5/IN6 are dedicated differential pairs; IN3/IN4 accept single-ended signals. All inputs are validated in the SI5338C-B05559-GM datasheet with specified slew rate, voltage, and impedance requirements to maintain sub-1 ps RMS jitter performance.

Is the SI5338C-B05559-GM pin-compatible with other Si5338 variants?

Yes, all Si5338 variants-including SI5338C-B05559-GM-share identical 24-QFN packaging, pinout, and register mapping. Differences reside solely in factory-programmed OTP NVM content (e.g., default frequencies, output formats, and spread-spectrum settings). Hardware-level compatibility enables drop-in replacement between Si5338A/B/C/D variants, provided configuration is reloaded or matches the SI5338C-B05559-GM's intended use case.

SI5338C-B05559-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338C-B05559-GM FAQ

1.How can I place an order for SI5338C-B05559-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338C-B05559-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338C-B05559-GM reliable?

The price and inventory of SI5338C-B05559-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338C-B05559-GM is usually 5 days.

3.What payment methods are accepted for SI5338C-B05559-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338C-B05559-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338C-B05559-GM?

SI5338C-B05559-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338C-B05559-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338C-B05559-GM?

For technical support, including SI5338C-B05559-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338C-B05559-GM requirements.

6.How does Aetrix verify that SI5338C-B05559-GM is sourced from the original manufacturer or authorized distributors?

All SI5338C-B05559-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338C-B05559-GM meets industry standards.

7.What is the process for return or replacement of SI5338C-B05559-GM?

All SI5338C-B05559-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338C-B05559-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338C-B05559-GM part is unused and in its original packaging.

Return procedure for SI5338C-B05559-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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