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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338C-B05611-GMR

Name: SI5338C-B05611-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338C-B05611-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338C-B05611-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338C-B05611-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

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Product details

Overview

SI5338C-B05611-GMR from Skyworks Solutions is a quad-output, I²C-programmable clock generator with MultiSynth™ frequency synthesis. It delivers four independent, any-frequency outputs (0.16–710 MHz) with 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 and SRNS compliance, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL signal formats in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338C-B05611-GMR datasheet, SI5338C-B05611-GMR pinout, SI5338C-B05611-GMR application, or SI5338C-B05611-GMR equivalent, key selection criteria include PCIe Gen 4 common-clock jitter performance (0.15–0.45 ps RMS), independent output voltage per driver (1.5/1.8/2.5/3.3 V), spread-spectrum control (0.5–5.0% down-spread), and I²C/SMBus programmability with ClockBuilder Pro software integration.

Technical Context

The SI5338C-B05611-GMR implements a two-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesis blocks, each feeding a configurable output driver. This enables true zero-ppm frequency accuracy across all outputs without requiring external loop filters or VCO tuning components.

It supports flexible input references including 8–30 MHz crystals, 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL, and 5–710 MHz differential inputs. Output drivers are independently configurable for format, voltage, slew rate, and termination - enabling simultaneous generation of PCIe 100 MHz HCSL, Ethernet 125 MHz LVDS, and processor 1 GHz CMOS clocks from a single device.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count	Four independent differential or single-ended outputs (CLK0A/B through CLK3A/B)
Frequency range	0.16–710 MHz per output; supports integer/fractional synthesis with 1 ppb resolution
Phase jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 4 common-clock and SRNS requirements
Input reference	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz)
Supply voltages	Core: 1.8/2.5/3.3 V; Output buffers: independently selectable 1.5/1.8/2.5/3.3 V per driver
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch, exposed thermal pad
Operating temp	–40 °C to +85 °C ambient; qualified for industrial and telecom line card environments

Pinout & Package

SI5338C-B05611-GMR is housed in a 24-lead, 4 × 4 mm QFN package with wettable flanks and an exposed thermal pad. Pin 1 is top-left corner (IN1), pin numbering proceeds counter-clockwise. The package supports reflow soldering per JEDEC J-STD-020 (peak 260 °C).

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential input pairs	Accept AC-coupled differential clocks up to 710 MHz; internally terminated with 100 Ω
IN3, IN4	Single-ended input pins	Support CMOS/SSTL/HSTL inputs (5–350 MHz); VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A–CLK3B	Differential output pairs	Four fully independent output drivers; each configurable for LVPECL/LVDS/HCSL/CML/SSTL/HSTL
VDDO0–VDDO3	Output buffer supplies	Independent 1.5/1.8/2.5/3.3 V supply per output bank; decoupling required per pin
VDD	Core supply	Single 1.8/2.5/3.3 V core rail; PSRR optimized for low-noise clock generation
SCL, SDA	I²C interface	SMBus-compatible 100/400 kHz interface; supports ClockBuilder Pro configuration and runtime updates
INTR	Interrupt output	Open-drain status indicator for loss-of-lock (LOL) and loss-of-signal (LOS) events

Key Features

Feature	Design Value
Independent frequency increment/decrement	Glitchless real-time adjustments in 1 ppm steps via dedicated pins or I²C
Programmable phase offset	±45 ns initial offset per output with <20 ps step resolution for skew alignment
Spread-spectrum clocking	Configurable on any output: 5–350 MHz center, 0.5–5.0% spread, 33–63 kHz modulation rate
External feedback mode	Enables zero-delay operation for clock distribution networks with precise phase alignment
Loss-of-lock and loss-of-signal detection	Hardware alarms with sub-10 µs response time (tLOS = 2.6–5 µs, tLOL = 5–10 ms)

Applications

PCIe Gen 4 Switch Timing	Ethernet 10GbE PHY Clocking
Use Scenario: Providing synchronized 100 MHz HCSL clocks to multiple PCIe Gen 4 switch ASICs in a server backplane. IC Role / Device Role / Timing Role: Quad-output common-clock generator meeting PCIe Gen 4 SRNS jitter spec (≤0.32 ps RMS) with independent output enable/disable. Use Value: Eliminates four discrete oscillators while maintaining sub-0.3 ps RMS jitter across all four lanes under varying load conditions.	Use Scenario: Generating 156.25 MHz LVDS and 312.5 MHz CML clocks for dual 10GbE PHYs in a network interface card. IC Role / Device Role / Timing Role: Any-frequency synthesizer delivering two distinct high-frequency outputs with matched phase alignment. Use Value: Enables single-chip timing for multi-rate Ethernet PHYs without external dividers or delay-matching circuitry.
FPGA I/O Bank Clocking	Broadcast Video Frame Sync
Use Scenario: Supplying 100 MHz LVDS, 200 MHz CMOS, and 300 MHz SSTL clocks to separate FPGA I/O banks in a video processing SoM. IC Role / Device Role / Timing Role: Configurable level translator and frequency synthesizer supporting mixed-voltage I/O standards. Use Value: Reduces BOM count by replacing three discrete clock buffers and one oscillator, with per-bank voltage and format control.	Use Scenario: Distributing SMPTE 2082/2083 compliant 27 MHz and 74.25 MHz clocks across SDI transmitter/receiver modules in broadcast gear. IC Role / Device Role / Timing Role: Low-jitter, zero-ppm accuracy clock generator with deterministic phase relationship between outputs. Use Value: Ensures frame-accurate synchronization across multiple video paths with <100 ps inter-output skew.

PCIe Gen 4 Switch Timing

Ethernet 10GbE PHY Clocking

Use Scenario: Providing synchronized 100 MHz HCSL clocks to multiple PCIe Gen 4 switch ASICs in a server backplane.

IC Role / Device Role / Timing Role: Quad-output common-clock generator meeting PCIe Gen 4 SRNS jitter spec (≤0.32 ps RMS) with independent output enable/disable.

Use Value: Eliminates four discrete oscillators while maintaining sub-0.3 ps RMS jitter across all four lanes under varying load conditions.

Use Scenario: Generating 156.25 MHz LVDS and 312.5 MHz CML clocks for dual 10GbE PHYs in a network interface card.

IC Role / Device Role / Timing Role: Any-frequency synthesizer delivering two distinct high-frequency outputs with matched phase alignment.

Use Value: Enables single-chip timing for multi-rate Ethernet PHYs without external dividers or delay-matching circuitry.

FPGA I/O Bank Clocking

Broadcast Video Frame Sync

Use Scenario: Supplying 100 MHz LVDS, 200 MHz CMOS, and 300 MHz SSTL clocks to separate FPGA I/O banks in a video processing SoM.

IC Role / Device Role / Timing Role: Configurable level translator and frequency synthesizer supporting mixed-voltage I/O standards.

Use Value: Reduces BOM count by replacing three discrete clock buffers and one oscillator, with per-bank voltage and format control.

Use Scenario: Distributing SMPTE 2082/2083 compliant 27 MHz and 74.25 MHz clocks across SDI transmitter/receiver modules in broadcast gear.

IC Role / Device Role / Timing Role: Low-jitter, zero-ppm accuracy clock generator with deterministic phase relationship between outputs.

Use Value: Ensures frame-accurate synchronization across multiple video paths with <100 ps inter-output skew.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D05611-GM	Higher integration: includes integrated crystal, smaller 3 × 3 mm 24-QFN, lower power (32 mA typ), but fixed 4-output topology with no pin-selectable variants	Targeted at space-constrained designs where crystal integration reduces board area; lacks external crystal option and some Si5338 flexibility	Select when footprint and crystal integration outweigh need for external reference flexibility and legacy design compatibility
ICS853S01AG-01LFT	Non-programmable, fixed-frequency 4-output LVDS clock generator; 1.2 ps RMS jitter; no I²C interface or spread-spectrum capability	Used in cost-sensitive, high-volume applications where frequencies are static and jitter margin is relaxed	Select only when exact pre-defined frequencies match and programmability is unnecessary

Compared with Si5332A-D05611-GM and ICS853S01AG-01LFT, the SI5338C-B05611-GMR offers field-programmable frequency agility, PCIe Gen 4 SRNS compliance, and full I²C configurability - making it suitable for evolving high-speed serial interface designs where timing requirements change post-deployment.

Availability

SI5338C-B05611-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, 10GbE PHY clocking, and FPGA I/O bank synchronization requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338C-B05611-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 product line was designed for high-performance, multi-protocol clock generation in datacenter, networking, and broadcast equipment - emphasizing low jitter, programmability, and interoperability with PCIe, Ethernet, and SONET/SDH standards.

FAQ

What is the maximum output frequency supported by the SI5338C-B05611-GMR?

The SI5338C-B05611-GMR supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, 250 MHz on HCSL, and 200 MHz on CMOS outputs. Frequencies above 350 MHz are limited to two unique values simultaneously (Fvco/4 and Fvco/6) due to internal VCO constraints. All outputs maintain 0.7 ps RMS typical jitter within their respective ranges.

Does the SI5338C-B05611-GMR support PCIe Gen 4 Separate Reference No Spread (SRNS) timing?

Yes, the SI5338C-B05611-GMR is explicitly compliant with PCIe Gen 4 SRNS requirements, delivering ≤0.32 ps RMS jitter (typical 0.11 ps) when configured with a PLL bandwidth of 2–4 MHz and CDR set to 10 MHz. This is verified per PCI Express Base Specification 4.0 rev. 0.5 and measured using the Skyworks PCIe Clock Jitter Tool.

Can the SI5338C-B05611-GMR generate different output voltages on each driver?

Yes, the SI5338C-B05611-GMR provides independent VDDOx supplies (VDDO0–VDDO3) allowing each of its four output drivers to operate at 1.5 V, 1.8 V, 2.5 V, or 3.3 V - enabling direct interfacing with mixed-voltage logic families (e.g., 1.8 V FPGA banks and 3.3 V legacy peripherals) without external level shifters.

How is the SI5338C-B05611-GMR programmed, and is ClockBuilder Pro required?

The SI5338C-B05611-GMR is programmed via its I²C/SMBus interface (SCL/SDA pins). While ClockBuilder Pro is the recommended GUI-based configuration tool from Skyworks, register-level programming is fully documented in the datasheet and supported by custom firmware. Pre-programmed OTP versions are also available for production deployment.

What is the thermal performance of the SI5338C-B05611-GMR in continuous operation?

The SI5338C-B05611-GMR has a junction-to-ambient thermal resistance (θJA) of 37 °C/W under still-air conditions. At typical 45 mA core current and 3.3 V supply, power dissipation remains below 150 mW, keeping junction temperature well within the 150 °C absolute maximum even at +85 °C ambient - validated per JEDEC JESD51-2.

SI5338C-B05611-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338C-B05611-GMR FAQ

1.How can I place an order for SI5338C-B05611-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338C-B05611-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338C-B05611-GMR reliable?

The price and inventory of SI5338C-B05611-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338C-B05611-GMR is usually 5 days.

3.What payment methods are accepted for SI5338C-B05611-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338C-B05611-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338C-B05611-GMR?

SI5338C-B05611-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338C-B05611-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338C-B05611-GMR?

For technical support, including SI5338C-B05611-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338C-B05611-GMR requirements.

6.How does Aetrix verify that SI5338C-B05611-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338C-B05611-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338C-B05611-GMR meets industry standards.

7.What is the process for return or replacement of SI5338C-B05611-GMR?

All SI5338C-B05611-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338C-B05611-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338C-B05611-GMR part is unused and in its original packaging.

Return procedure for SI5338C-B05611-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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