Skyworks Solutions Inc. SI5338C-B05627-GM

Overview

SI5338C-B05627-GM from Skyworks Solutions is a quad-output, I²C-programmable clock generator with MultiSynth™ frequency synthesis. It delivers four independent, any-frequency clocks (0.16–710 MHz) with 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 and SRNS compliance, and configurable LVPECL/LVDS/HCSL/CMOS outputs - used in high-speed serial interface timing for FPGA-based telecom line cards.

For engineers reviewing the SI5338C-B05627-GM datasheet, SI5338C-B05627-GM pinout, SI5338C-B05627-GM application, or SI5338C-B05627-GM equivalent, key selection criteria include differential output jitter performance at 100 MHz HCSL, spread-spectrum modulation configurability per output, independent VDDO voltage control (1.5–3.3 V), and I²C/SMBus programmability with ClockBuilder Pro support.

Technical Context

The SI5338C-B05627-GM implements a two-stage PLL architecture: a high-stability reference stage (input range 5–710 MHz) followed by four independent MultiSynth™ fractional-N synthesis blocks, each driving a configurable output buffer. Its core operates from a single 1.8/2.5/3.3 V supply with 45 mA typical current draw.

Each of the four differential output pairs (CLK0A/B through CLK3A/B) supports independent format selection (LVPECL, LVDS, HCSL, CML, SSTL, HSTL, CMOS), voltage scaling (1.5–3.3 V), phase offset (<20 ps step), and spread-spectrum modulation (0.5–5.0% down-spread, 33–63 kHz rate). Input references include crystal (8–30 MHz), CMOS (5–200 MHz), or differential (5–710 MHz).

Key Specifications

Pinout & Package

SI5338C-B05627-GM is housed in a 24-lead, 4 × 4 mm QFN package with wettable flanks and an exposed thermal pad (pin 24 = GND). Pin assignments are fixed across Si5338 family variants.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output clock generator applications.

Compared with Si5338A-B-GM, SI5338C-B05627-GM adds verified PCIe Gen 4 Common Clock compliance and tighter jitter specs; versus LMK04832, it trades output count and JESD204B features for smaller size, lower power, and simpler I²C-only configuration - making it optimal for space-constrained, cost-sensitive PCIe/Ethernet timing.

Availability

SI5338C-B05627-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switch synchronization, and FPGA-based telecom line card applications requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338C-B05627-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The Si5338 family is engineered for high-performance, multi-protocol clock generation in networking, computing, and broadcast equipment - emphasizing low jitter, flexible synthesis, and software-configurable timing.

FAQ

What is the maximum output frequency supported by SI5338C-B05627-GM?

The SI5338C-B05627-GM supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, 250 MHz on HCSL, and 200 MHz on CMOS. However, only two unique frequencies above 350 MHz can be generated simultaneously - specifically Fvco/4 and Fvco/6 - due to internal VCO constraints. All other outputs must be ≤350 MHz in that configuration.

Does SI5338C-B05627-GM support PCIe Gen 4 Common Clock mode?

Yes, SI5338C-B05627-GM is explicitly validated for PCIe Gen 4 Common Clock operation with 0.15–0.45 ps RMS jitter (10 kHz–50 MHz band), meeting the PCI-SIG Base Specification 4.0 rev. 0.5 requirements. This capability is confirmed in Table 12 of the official Skyworks datasheet Rev. 1.6 and distinguishes it from earlier Si5338A variants.

Can SI5338C-B05627-GM generate different output voltages on each channel?

Yes, SI5338C-B05627-GM provides four independent VDDO supply pins (VDDO0–VDDO3), each configurable from 1.4 V to 3.63 V. This allows simultaneous LVPECL (2.5 V), LVDS (1.8 V), HCSL (1.8 V), and CMOS (3.3 V) outputs - enabling direct interface to mixed-voltage ASICs and FPGAs without external level shifters.

How is SI5338C-B05627-GM programmed in-system?

SI5338C-B05627-GM uses a standard I²C/SMBus interface (SCL/SDA pins) operating at 100 kHz or 400 kHz. Configuration is performed using Skyworks' ClockBuilder Pro software, which generates register maps and supports one-click programming via USB-to-I²C adapters. No external nonvolatile memory is required - factory OTP stores default settings.

What is the thermal performance of SI5338C-B05627-GM in continuous operation?

SI5338C-B05627-GM has a junction-to-ambient thermal resistance (θJA) of 37 °C/W under still-air conditions. With typical 45 mA core current and 3.3 V supply, power dissipation remains below 150 mW - ensuring reliable operation within the –40 °C to +85 °C industrial temperature range without forced airflow or heatsinking in standard 2-layer PCB layouts.