Skyworks Solutions Inc. SI5338C-B05627-GMR

Overview

SI5338C-B05627-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation from 1.8/2.5/3.3 V core supply in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338C-B05627-GMR datasheet, SI5338C-B05627-GMR pinout, SI5338C-B05627-GMR application, or SI5338C-B05627-GMR equivalent, key selection criteria include PCIe Gen 4 jitter compliance (0.15–0.45 ps RMS), independent output voltage per driver (1.5/1.8/2.5/3.3 V), MultiSynth™ frequency synthesis resolution (1 ppb), spread-spectrum control (0.5–5.0% spread, 33–63 kHz modulation), and loss-of-lock/loss-of-signal alarm support.

Technical Context

The SI5338C-B05627-GMR implements a two-stage PLL architecture: a high-stability reference stage (input conditioning + phase detector + loop filter + VCO) feeding four independent MultiSynth™ fractional-N synthesis blocks. Each MultiSynth supports integer or fractional mode, enabling any-frequency generation from 0.16 MHz to 710 MHz across LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL outputs.

Input flexibility includes external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) references. Output drivers feature independent voltage selection, programmable initial phase offset (±45 ns), and glitchless frequency increment/decrement in 1 ppm steps with <20 ps phase step accuracy.

Key Specifications

Pinout & Package

SI5338C-B05627-GMR is housed in a 4 mm × 4 mm, 24-lead QFN package with exposed thermal pad. Pin assignments are fixed per the Si5338 family and validated for this variant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Compared with Si5338A-B05627-GM, SI5338C-B05627-GMR provides identical electrical performance but ships with a different factory-programmed frequency plan; compared with LMK04832ISQE/NOPB, it delivers equivalent PCIe Gen 4 jitter compliance in half the footprint and 62% lower core current, making it optimal for compact, power-sensitive switch/router timing.

Availability

SI5338C-B05627-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switch clocking, broadcast video sync, and FPGA-based telecom line card applications requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for SI5338C-B05627-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 product line was designed to replace multiple discrete oscillators with a single programmable clock generator for high-speed serial interfaces-including PCIe, Ethernet, Fibre Channel, and broadcast video-while maintaining ultra-low jitter and field-upgradable timing configurations.

FAQ

What is the factory-programmed configuration of SI5338C-B05627-GMR?

The SI5338C-B05627-GMR is pre-programmed with a specific multi-output frequency plan stored in one-time-programmable (OTP) memory. This configuration defines default output frequencies, formats, and voltage levels at power-up, eliminating the need for external I²C initialization in many applications. The exact plan is documented in Skyworks' custom configuration file associated with B05627; SI5338C-B05627-GMR retains full reprogrammability via I²C after power-on.

Does SI5338C-B05627-GMR support PCIe Gen 4 Separate Reference No Spread (SRNS) mode?

Yes, SI5338C-B05627-GMR supports PCIe Gen 4 SRNS mode with 0.11–0.32 ps RMS jitter (typical) when configured with PLL bandwidth of 2–4 MHz or 2–5 MHz and CDR set to 10 MHz. This compliance is verified per PCI-Express Base Specification 4.0 rev 0.5 and measured using the Skyworks PCIe Clock Jitter Tool. SI5338C-B05627-GMR achieves this using its MultiSynth™ fractional-N synthesis and low-noise VCO architecture.

Can SI5338C-B05627-GMR generate four independent frequencies above 350 MHz simultaneously?

No. SI5338C-B05627-GMR can output only two unique frequencies above 350 MHz simultaneously-specifically Fvco/4 and Fvco/6-as defined by the MultiSynth™ architecture. Other outputs above 350 MHz must be harmonically related (e.g., integer multiples). For example, generating 400 MHz, 500 MHz, 600 MHz, and 700 MHz concurrently is not supported; SI5338C-B05627-GMR instead supports up to four independent frequencies ≤350 MHz or two >350 MHz plus two ≤350 MHz.

What is the minimum input frequency supported in PLL bypass (clock buffer) mode for SI5338C-B05627-GMR?

In PLL bypass mode, SI5338C-B05627-GMR supports input frequencies as low as 1 MHz on single-ended inputs (IN3/IN4) and 5 MHz on differential inputs (IN1/IN2/IN5/IN6). However, loss-of-signal (LOS) detection is only functional above 5 MHz. Below that threshold, the device operates as a passive buffer but cannot assert the INTR pin for signal loss-this behavior is confirmed in Table 6 notes and Section 3.2 of the datasheet.

How does the spread-spectrum feature of SI5338C-B05627-GMR improve EMI performance?

The SI5338C-B05627-GMR's spread-spectrum feature reduces electromagnetic interference by modulating the output clock frequency over a user-defined range (0.5–5.0% down-spread) at a selectable rate (33–63 kHz). This spreads energy across a wider bandwidth, lowering peak spectral amplitude by up to 15 dB compared to a fixed-frequency clock-enabling easier compliance with FCC Class B and CISPR 22 radiated emissions limits without added shielding or filtering.