Skyworks Solutions Inc. SI5338C-B05628-GM

Overview

SI5338C-B05628-GM from Skyworks Solutions is a quad-output, I²C-programmable clock generator with MultiSynth™ frequency synthesis. It delivers four independent, any-frequency outputs (0.16–710 MHz) with 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 compliance, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats. It replaces up to four crystal oscillators in FPGA, processor, and Ethernet switch timing applications.

For engineers reviewing the SI5338C-B05628-GM datasheet, SI5338C-B05628-GM pinout, SI5338C-B05628-GM application, or SI5338C-B05628-GM equivalent, key selection criteria include differential output jitter performance (0.7 ps RMS), PCIe Gen 4 Common Clock compliance, independent per-output voltage control (1.5–3.3 V), spread-spectrum capability (0.5–5.0% down-spread), and 24-QFN package compatibility with PCB land pattern IPC-7351B.

Technical Context

The SI5338C-B05628-GM implements a two-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesizers. Each output path includes programmable phase offset (<20 ps step resolution), frequency increment/decrement (1 ppm steps), and configurable spread-spectrum modulation (33–63 kHz rate, 0.5–5.0% deviation).

It accepts six input references - including 8–30 MHz crystals, 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL, and 5–710 MHz differential - and supports external feedback for zero-delay operation. Loss-of-lock and loss-of-signal alarms are integrated for system monitoring.

Key Specifications

Pinout & Package

The SI5338C-B05628-GM is housed in a 24-lead, 4 × 4 mm QFN package with exposed thermal pad (pin 24). Pin assignments follow Skyworks' standard Si5338 pinout: dual differential inputs (IN1/IN2, IN5/IN6), single-ended inputs (IN3, IN4), four differential output pairs (CLK0A/B–CLK3A/B), dedicated I²C lines (SCL, SDA), interrupt (INTR), and per-output supply rails (VDDO0–VDDO3).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generation applications.

Compared with Si5338A-B-GM, SI5338C-B05628-GM adds verified PCIe Gen 4 Common Clock compliance and SRNS support; compared with LMK04832RHAT, it offers lower power, smaller footprint, and integrated any-frequency synthesis-but lacks jitter cleaning capability for degraded input references.

Availability

SI5338C-B05628-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 server motherboards, 10G/25G Ethernet switches, and broadcast video processing platforms requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5338C-B05628-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 product line was designed for high-performance, multi-output clock generation in space-constrained systems-enabling consolidation of discrete oscillators and flexible timing in FPGA, processor, and high-speed serial interface applications.

FAQ

What is the maximum output frequency supported by the SI5338C-B05628-GM?

The SI5338C-B05628-GM supports up to 710 MHz on LVPECL, LVDS, or CML outputs, 350 MHz on SSTL/HSTL, 250 MHz on HCSL, and 200 MHz on CMOS outputs. Frequencies above 350 MHz are limited to two unique values simultaneously (Fvco/4 and Fvco/6), as defined in the synthesis architecture. All outputs maintain 0.7 ps RMS typical jitter within their respective format-specific ranges.

Does the SI5338C-B05628-GM support spread-spectrum clocking (SSC)?

Yes, the SI5338C-B05628-GM supports programmable spread-spectrum clocking on any output: modulation rate 33–63 kHz, spread depth 0.5–5.0%, and frequency range 5–350 MHz. Default settings are ~31.5 kHz center frequency and 0.5% down-spread. SSC is implemented digitally within the MultiSynth™ engine and does not require external components.

Can the SI5338C-B05628-GM operate in clock buffer mode (PLL bypass)?

Yes, the SI5338C-B05628-GM supports clock buffer mode with additive phase jitter as low as 0.165 ps RMS (12 kHz–20 MHz) for 622.08 MHz differential inputs. In this mode, the PLL is disabled and outputs directly replicate the input clock with minimal added jitter, while retaining independent output formatting and voltage control.

What input reference options are compatible with the SI5338C-B05628-GM?

The SI5338C-B05628-GM accepts eight input reference types: 8–30 MHz crystal (differential), 5–200 MHz CMOS (single-ended), 5–350 MHz SSTL/HSTL (single-ended), and 5–710 MHz differential (AC-coupled). Pins IN1/IN2 and IN5/IN6 support differential inputs; IN3 and IN4 support single-ended CMOS/SSTL/HSTL; internal crystal oscillator circuitry supports fundamental-mode crystals only.

How is the SI5338C-B05628-GM programmed and configured?

The SI5338C-B05628-GM is programmed via its I²C/SMBus-compatible serial interface using Skyworks' ClockBuilder Pro software, which generates register maps and configuration files. Configuration can be stored in one-time-programmable (OTP) NVM for power-on initialization or loaded dynamically at runtime. Pin-strapping options allow basic boot modes, but full feature access requires I²C communication.