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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338C-B05629-GMR

Name: SI5338C-B05629-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338C-B05629-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338C-B05629-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338C-B05629-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338C-B05629-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation from 1.8/2.5/3.3 V core supply in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338C-B05629-GMR datasheet, SI5338C-B05629-GMR pinout, SI5338C-B05629-GMR application, or SI5338C-B05629-GMR equivalent, key selection criteria include PCIe Gen 4 jitter compliance (0.15–0.45 ps RMS), independent output voltage per driver (1.5/1.8/2.5/3.3 V), MultiSynth™ fractional synthesis resolution (1 ppb), spread-spectrum control (0.5–5.0% deviation), and I²C/SMBus programmability with ClockBuilder Pro support.

Technical Context

The SI5338C-B05629-GMR implements a two-stage PLL architecture: a high-stability reference stage (VCO + loop filter) feeding four independent MultiSynth™ synthesis blocks, each with programmable R/M/N dividers and fractional capability. Input flexibility includes external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) references.

Each of the four output drivers supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats with independent supply voltage (VDDO0–VDDO3), programmable phase offset (±45 ns, <20 ps step), glitchless frequency increment/decrement (1 ppm steps), and configurable spread spectrum (33–63 kHz modulation rate, 0.5–5.0% spread).

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 4 common clock spec (≤0.45 ps RMS)
Output Count & Type	4 independent outputs; supports up to 4 differential (LVPECL/LVDS/HCSL/CML) or 8 single-ended (CMOS/SSTL/HSTL) clocks
Frequency Range	LVPECL/LVDS: 0.16–710 MHz; HCSL: 0.16–250 MHz; CMOS: 0.16–200 MHz; SSTL/HSTL: 0.16–350 MHz
Synthesis Resolution	1 ppb frequency step size; enables true zero-ppm accuracy on all outputs via MultiSynth™ fractional-N synthesis
Supply Voltages	Core: 1.8/2.5/3.3 V ±10%; Output buffers: independently configurable 1.5/1.8/2.5/3.3 V per driver (VDDO0–VDDO3)
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch; RoHS-compliant, moisture-sensitive level 3
Operating Temp	–40 °C to +85 °C ambient; qualified for industrial and telecom line card environments

Pinout & Package

SI5338C-B05629-GMR is housed in a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments follow standard Si5338 top-view layout: IN1/IN2 (differential ref 1), IN3/IN4 (single-ended ref), IN5/IN6 (differential ref 2), CLK0A/CLK0B through CLK3A/CLK3B (four differential output pairs), VDD (core supply), VDDO0–VDDO3 (output buffer supplies), SCL/SDA/INTR (I²C interface), and GND/RSVD_GND.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2	Differential reference input 1	Accepts 5–710 MHz AC-coupled differential clock; internal 100 Ω termination enabled
IN3, IN4	Single-ended reference inputs	Support CMOS/SSTL/HSTL; 5–350 MHz range; VIH = 0.7×VDD, VIL = 0.3×VDD
IN5, IN6	Differential reference input 2	Second independent differential input path; identical specs to IN1/IN2
CLK0A–CLK3B	Differential output pairs	Four fully independent output drivers; each pair configurable as LVPECL/LVDS/HCSL/CML
VDDO0–VDDO3	Output buffer supply rails	Independent 1.5/1.8/2.5/3.3 V supplies per output bank; enables mixed-voltage system interfacing
SCL, SDA	I²C/SMBus interface	Standard 100/400 kHz operation; supports ClockBuilder Pro programming and runtime reconfiguration
INTR	Interrupt output	Open-drain status indicator for loss-of-lock (LOL) and loss-of-signal (LOS) events

Key Features

Feature	Design Value
MultiSynth™ synthesis	Enables independent any-frequency generation on all four outputs with 1 ppb resolution and zero ppm error
PCIe Gen 4 compliance	Meets PCIe Base Spec 4.0 common clock jitter requirement (≤0.45 ps RMS, 10 kHz–50 MHz)
Glitchless frequency tuning	Hardware-supported frequency increment/decrement at 1 ppm steps without output interruption
Programmable phase alignment	±45 ns phase offset per output with <20 ps adjustment granularity for precise skew control
Spread-spectrum clocking	Configurable SSC on any output: 0.5–5.0% spread, 33–63 kHz modulation rate, down-spread default
Flexible reference inputs	Supports crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), and differential (5–710 MHz) sources

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch/Routing
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switch ICs in a data center fabric card. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four low-jitter (≤0.45 ps RMS) HCSL clocks with matched phase alignment across lanes. Use Value: Enables full Gen 4 link training and stable 16 GT/s operation without retiming or jitter accumulation across switch ports.	Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10/25 GbE PHYs and MACs in a modular Ethernet switch ASIC. IC Role / Device Role / Timing Role: Frequency translator and format converter-accepting 25 MHz crystal input and synthesizing three distinct high-speed Ethernet rates. Use Value: Eliminates need for multiple discrete oscillators; reduces BOM count and board area while maintaining sub-1 ps RMS jitter.
Broadcast Video Timing	FPGA Processor Clocking
Use Scenario: Delivering SMPTE ST 2082 (28.63636 GHz) and ST 2081 (27 MHz) reference clocks to video encoder/decoder FPGAs in broadcast production gear. IC Role / Device Role / Timing Role: Any-frequency synthesizer generating exact broadcast-standard frequencies from a single 25 MHz crystal. Use Value: Achieves true zero-ppm accuracy required for genlock and frame synchronization across multi-channel video pipelines.	Use Scenario: Supplying 500 MHz system clock, 250 MHz DDR4 memory clock, and 100 MHz peripheral bus clock to Xilinx Versal ACAP in telecom baseband processing. IC Role / Device Role / Timing Role: Configurable clock source supporting mixed-voltage FPGA domains (1.0 V core, 1.2 V memory, 3.3 V I/O). Use Value: Independent VDDO supplies allow direct connection to each FPGA voltage domain without level shifters or external regulators.

PCIe Gen 4 Switch Timing

Ethernet Switch/Routing

Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switch ICs in a data center fabric card.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering four low-jitter (≤0.45 ps RMS) HCSL clocks with matched phase alignment across lanes.

Use Value: Enables full Gen 4 link training and stable 16 GT/s operation without retiming or jitter accumulation across switch ports.

Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10/25 GbE PHYs and MACs in a modular Ethernet switch ASIC.

IC Role / Device Role / Timing Role: Frequency translator and format converter-accepting 25 MHz crystal input and synthesizing three distinct high-speed Ethernet rates.

Use Value: Eliminates need for multiple discrete oscillators; reduces BOM count and board area while maintaining sub-1 ps RMS jitter.

Broadcast Video Timing

FPGA Processor Clocking

Use Scenario: Delivering SMPTE ST 2082 (28.63636 GHz) and ST 2081 (27 MHz) reference clocks to video encoder/decoder FPGAs in broadcast production gear.

IC Role / Device Role / Timing Role: Any-frequency synthesizer generating exact broadcast-standard frequencies from a single 25 MHz crystal.

Use Value: Achieves true zero-ppm accuracy required for genlock and frame synchronization across multi-channel video pipelines.

Use Scenario: Supplying 500 MHz system clock, 250 MHz DDR4 memory clock, and 100 MHz peripheral bus clock to Xilinx Versal ACAP in telecom baseband processing.

IC Role / Device Role / Timing Role: Configurable clock source supporting mixed-voltage FPGA domains (1.0 V core, 1.2 V memory, 3.3 V I/O).

Use Value: Independent VDDO supplies allow direct connection to each FPGA voltage domain without level shifters or external regulators.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D05629-GM	Higher integration: 8 outputs, integrated LDOs, lower jitter (0.35 ps RMS), supports JESD204B deterministic latency	Targeted at JESD204B ADC/DAC timing and multi-ASIC synchronization where deterministic delay matters	Choose when >4 outputs, sub-0.4 ps jitter, or deterministic latency is required; higher cost and larger 5×5 mm package
ICS8430I-01T	Fixed-frequency, non-programmable; 4 LVDS outputs; 1.2 ps RMS jitter; no I²C interface or spread spectrum	Used in cost-sensitive, static-clock applications like legacy storage controllers or fixed-rate video interfaces	Choose only if configuration flexibility, PCIe Gen 4 compliance, or software reprogrammability are unnecessary

Compared with Si5332A-D05629-GM and ICS8430I-01T, SI5338C-B05629-GMR delivers optimal balance of programmability, PCIe Gen 4 readiness, and compact 4×4 mm footprint-making it ideal for space-constrained, multi-protocol systems requiring field-upgradable timing.

Availability

SI5338C-B05629-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switching/routing, broadcast video synchronization, and FPGA processor clocking requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338C-B05629-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, mobile, infrastructure, and timing solutions with over 30 years of RF and clocking innovation.

The Si5338 product line was designed specifically for high-performance, multi-protocol serial interface timing-including PCIe, Ethernet, Fibre Channel, and broadcast video-where low jitter, flexible synthesis, and software configurability are critical.

FAQ

What is the maximum output frequency supported by SI5338C-B05629-GMR in LVPECL mode?

The SI5338C-B05629-GMR supports LVPECL output frequencies up to 710 MHz. This is confirmed in Table 6 of the datasheet under "Output Clocks (Differential)" for LVPECL/LVDS/CML. Operation above 350 MHz is limited to two unique frequencies simultaneously (Fvco/4 and Fvco/6), but SI5338C-B05629-GMR maintains full specification compliance at 710 MHz in LVPECL format with appropriate load termination and layout.

Does SI5338C-B05629-GMR support PCIe Gen 4 Separate Reference No Spread (SRNS) mode?

Yes, SI5338C-B05629-GMR is explicitly compliant with PCIe Gen 3 SRNS and Gen 4 Common Clock specifications. Table 12 lists "PCIe Gen 3 Separate Reference No Spread, SRNS" with 0.11–0.32 ps RMS jitter and "PCIe Gen 4, Common Clock" with 0.15–0.45 ps RMS jitter-both measured under defined PLL bandwidth (2–4 or 2–5 MHz) and CDR (10 MHz) conditions per PCI-SIG requirements.

Can SI5338C-B05629-GMR generate four different output frequencies simultaneously?

Yes, SI5338C-B05629-GMR uses four independent MultiSynth™ synthesis blocks to generate four fully independent output frequencies simultaneously-each with its own M/N/R divider settings, format, voltage, and phase offset. The datasheet states "synthesizing any frequency on each of the device's four output drivers" and confirms "independent, any-frequency synthesis on four differential output drivers" as a core feature.

What reference clock sources are compatible with SI5338C-B05629-GMR?

SI5338C-B05629-GMR accepts four types of reference inputs: external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), and differential (5–710 MHz). These are detailed in the Features section and Table 6. The device supports up to six physical reference pins (IN1–IN6), grouped into three differential pairs, enabling redundant or multi-source timing architectures.

Is ClockBuilder Pro software required to configure SI5338C-B05629-GMR?

No, ClockBuilder Pro is optional but strongly recommended. SI5338C-B05629-GMR is fully programmable via standard I²C/SMBus commands per register map in Section 6 of the datasheet. ClockBuilder Pro simplifies configuration, validates settings against electrical constraints, generates initialization code, and supports field updates-but raw register writes are sufficient for basic or custom implementations.

SI5338C-B05629-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338C-B05629-GMR FAQ

1.How can I place an order for SI5338C-B05629-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338C-B05629-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338C-B05629-GMR reliable?

The price and inventory of SI5338C-B05629-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338C-B05629-GMR is usually 5 days.

3.What payment methods are accepted for SI5338C-B05629-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338C-B05629-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338C-B05629-GMR?

SI5338C-B05629-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338C-B05629-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338C-B05629-GMR?

For technical support, including SI5338C-B05629-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338C-B05629-GMR requirements.

6.How does Aetrix verify that SI5338C-B05629-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338C-B05629-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338C-B05629-GMR meets industry standards.

7.What is the process for return or replacement of SI5338C-B05629-GMR?

All SI5338C-B05629-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338C-B05629-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338C-B05629-GMR part is unused and in its original packaging.

Return procedure for SI5338C-B05629-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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