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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338C-B05720-GM

Name: SI5338C-B05720-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338C-B05720-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338C-B05720-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338C-B05720-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338C-B05720-GM from Skyworks Solutions is a quad-output, I²C-programmable clock generator implementing MultiSynth™ frequency synthesis with 0 ppm precision per output. It delivers four independent differential or single-ended clocks (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL) across 0.16–710 MHz, supports PCIe Gen 1–4 common clock and SRNS compliance, and operates from 1.8/2.5/3.3 V core supply in a 4 × 4 mm 24-QFN package for FPGA, processor, and high-speed serial interface timing.

For engineers reviewing the SI5338C-B05720-GM datasheet, SI5338C-B05720-GM pinout, SI5338C-B05720-GM application, or SI5338C-B05720-GM equivalent, key selection criteria include its 0.7 ps RMS phase jitter (typ), independent per-output voltage control (1.5–3.3 V), glitchless 1 ppm frequency increment/decrement, <20 ps phase step resolution, and support for external crystal (8–30 MHz) or wide-range differential inputs (5–710 MHz).

Technical Context

The SI5338C-B05720-GM integrates a two-stage PLL architecture: a high-stability reference stage (with programmable R-divider) feeding a MultiSynth™ fractional-N synthesizer per output. Each of the four synthesis paths includes independent M/N/P dividers, enabling true any-frequency generation without integer constraints on individual outputs.

Its output stage provides configurable drive strength, format, and supply voltage per driver (VDDO0–VDDO3), with dedicated loss-of-lock and loss-of-signal alarms, I²C/SMBus interface, and pin-controlled frequency/phase adjustment. The device supports zero-delay mode via external feedback and offers spread-spectrum clocking (0.5–5.0% spread, 33–63 kHz modulation) on any output.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3/4 SRNS and GbE jitter requirements
Output Frequency Range	0.16–710 MHz per channel; supports up to two >350 MHz outputs simultaneously (Fvco/4 & Fvco/6)
Input Reference Support	External crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Output Format Flexibility	LVPECL, LVDS, HCSL, CML, CMOS, SSTL, HSTL - each output independently selectable
Per-Output Supply Voltage	1.5 V, 1.8 V, 2.5 V, or 3.3 V per VDDOx pin; enables mixed-voltage system interfacing
Frequency Adjustment	Glitchless ±1 ppm steps via pin or I²C; update time ≤667 ns for outputs >18 MHz
Operating Temperature	–40 °C to +85 °C ambient; qualified for industrial and telecom line card environments

Pinout & Package

SI5338C-B05720-GM uses a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed per the Si5338 family: IN1/IN2 (diff input 1), IN3/IN4 (SE input), IN5/IN6 (diff input 2), CLK0A/CLK0B through CLK3A/CLK3B (four differential output pairs), VDD (core supply), VDDO0–VDDO3 (output buffer supplies), SCL/SDA/INTR (I²C interface and interrupt), and RSVD_GND (reserved ground).

Pin/Terminal	Circuit Role	Design Meaning
CLK0A / CLK0B	Differential Output Pair 0	LVPECL/LVDS/HCSL/CML-capable; independently configured frequency, format, and VDDO0
CLK1A / CLK1B	Differential Output Pair 1	Same configurability as CLK0; supports integer/fractional synthesis with <20 ps phase step
CLK2A / CLK2B	Differential Output Pair 2	Independent MultiSynth™ path; enables simultaneous PCIe Gen4 refclk + 10GbE TX/RX clocks
CLK3A / CLK3B	Differential Output Pair 3	Configurable for broadcast video timing (e.g., 27 MHz, 74.25 MHz) or FPGA fabric clock
IN1 / IN2	Differential Reference Input 1	Accepts 5–710 MHz; internal 100 Ω termination; slew rate >0.3 V/ns recommended for low jitter
IN3 / IN4	Single-Ended Reference Input	Supports CMOS/SSTL/HSTL; 5–350 MHz range; 2.0 pF input capacitance
VDD	Core Supply	1.8 V / 2.5 V / 3.3 V ±10%; 45 mA typical current at 100 MHz on all outputs
VDDO0–VDDO3	Output Buffer Supplies	Each powers one output pair; selectable 1.5/1.8/2.5/3.3 V to match downstream logic
SCL / SDA	I²C Interface	Standard-mode (100 kHz) and fast-mode (400 kHz) compatible; supports ClockBuilder Pro programming
INTR	Interrupt Output	Open-drain status signal for loss-of-lock or loss-of-signal events; 3 mA sink capability

Key Features

Feature	Design Value
MultiSynth™ Any-Frequency Synthesis	Four independent output clocks with 0 ppm accuracy and 1 ppb resolution - eliminates need for multiple crystals
PCIe Gen 1–4 Compliance	Meets Common Clock and Gen3 SRNS jitter specs (0.11–0.45 ps RMS); validated with Intel Clock Jitter Tool
Independent Per-Output Voltage Control	VDDO0–VDDO3 pins enable direct interfacing with mixed-voltage SoCs, FPGAs, and SerDes without level shifters
Glitchless Frequency Tuning	Hardware pin-controlled ±1 ppm increments with ≤667 ns update time - enables dynamic clock scaling in real time
Programmable Spread Spectrum	Configurable 0.5–5.0% down-spread at 33–63 kHz on any output - reduces EMI without affecting timing margins
Zero-Delay Mode Support	External feedback path allows synchronous clock distribution with matched propagation delay across multiple devices

Applications

PCIe Gen4 Switch Timing	Ethernet Switch Clocking
Use Scenario: 1U data center switch with dual 100G QSFP-DD ports and integrated PCIe Gen4 switch fabric. IC Role / Device Role / Timing Role: Generates synchronized 100 MHz PCIe reference clock and 156.25 MHz Ethernet PHY clocks from a single 25 MHz crystal. Use Value: Replaces three discrete oscillators; achieves <0.45 ps RMS jitter on PCIe refclk and meets IEEE 802.3bj jitter limits for 100GBASE-KR4.	Use Scenario: Carrier-grade Ethernet aggregation switch supporting 1 GbE, 10 GbE, and 25 GbE line cards. IC Role / Device Role / Timing Role: Provides 25 MHz, 125 MHz, and 156.25 MHz clocks to PHYs and MACs with independent voltage control per port group. Use Value: Enables single-board support for multi-rate PHYs; eliminates inter-port skew via sub-100 ps output-to-output skew.
Broadcast Video Synchronization	FPGA-Based Test Equipment
Use Scenario: SMPTE ST 2110 IP video router requiring genlock to external 27 MHz black burst and internal 74.25 MHz pixel clock. IC Role / Device Role / Timing Role: Accepts 27 MHz reference and synthesizes 74.25 MHz, 148.5 MHz, and 297 MHz clocks with <±1 ns phase alignment. Use Value: Achieves frame-accurate A/V sync across 64+ channels; supports SMPTE 2059-2 PTP timestamping via precise phase offset control.	Use Scenario: High-channel-count digital pattern generator using Xilinx Kintex Ultrascale+ FPGA with multiple transceiver banks. IC Role / Device Role / Timing Role: Delivers 100 MHz, 200 MHz, and 322.265625 MHz clocks to GTY transceivers, memory controllers, and logic fabric. Use Value: Eliminates board-level clock tree complexity; maintains <10 ps period jitter across all outputs for deterministic signal integrity.

PCIe Gen4 Switch Timing

Ethernet Switch Clocking

Use Scenario: 1U data center switch with dual 100G QSFP-DD ports and integrated PCIe Gen4 switch fabric.

IC Role / Device Role / Timing Role: Generates synchronized 100 MHz PCIe reference clock and 156.25 MHz Ethernet PHY clocks from a single 25 MHz crystal.

Use Value: Replaces three discrete oscillators; achieves <0.45 ps RMS jitter on PCIe refclk and meets IEEE 802.3bj jitter limits for 100GBASE-KR4.

Use Scenario: Carrier-grade Ethernet aggregation switch supporting 1 GbE, 10 GbE, and 25 GbE line cards.

IC Role / Device Role / Timing Role: Provides 25 MHz, 125 MHz, and 156.25 MHz clocks to PHYs and MACs with independent voltage control per port group.

Use Value: Enables single-board support for multi-rate PHYs; eliminates inter-port skew via sub-100 ps output-to-output skew.

Broadcast Video Synchronization

FPGA-Based Test Equipment

Use Scenario: SMPTE ST 2110 IP video router requiring genlock to external 27 MHz black burst and internal 74.25 MHz pixel clock.

IC Role / Device Role / Timing Role: Accepts 27 MHz reference and synthesizes 74.25 MHz, 148.5 MHz, and 297 MHz clocks with <±1 ns phase alignment.

Use Value: Achieves frame-accurate A/V sync across 64+ channels; supports SMPTE 2059-2 PTP timestamping via precise phase offset control.

Use Scenario: High-channel-count digital pattern generator using Xilinx Kintex Ultrascale+ FPGA with multiple transceiver banks.

IC Role / Device Role / Timing Role: Delivers 100 MHz, 200 MHz, and 322.265625 MHz clocks to GTY transceivers, memory controllers, and logic fabric.

Use Value: Eliminates board-level clock tree complexity; maintains <10 ps period jitter across all outputs for deterministic signal integrity.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output programmable clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D05720-GM	Higher integration: 8 outputs, lower jitter (0.35 ps RMS), supports JESD204B deterministic latency	Targeted at JESD204B ADC/DAC systems and multi-gigabit SerDes where deterministic phase alignment is critical	Select when >4 outputs or sub-0.4 ps jitter required; not drop-in due to different pinout and register map
ICS853S01AGI-01LFT	Fixed-function 4-output LVDS clock generator; no I²C programming; 1.2 ps RMS jitter; 0.1–700 MHz range	Cost-sensitive, high-volume applications with static clock trees (e.g., baseband units, legacy telecom)	Select for non-reprogrammable, lower-cost deployments where flexibility is not required

Compared with Si5332A-D05720-GM and ICS853S01AGI-01LFT, the SI5338C-B05720-GM uniquely balances field-programmability, PCIe Gen4 compliance, and industrial temperature operation in a compact 24-QFN footprint - making it optimal for reconfigurable infrastructure equipment where design reuse and future-proofing matter.

Availability

SI5338C-B05720-GM is available at Aetrix Electronics and suitable for PCIe Gen4 switch timing, Ethernet switch clocking, broadcast video synchronization, and FPGA-based test equipment requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338C-B05720-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The SI5338C-B05720-GM belongs to Skyworks' Si5338 family of programmable clock generators, designed specifically for high-density, multi-protocol timing in networking, computing, and broadcast systems where jitter performance, flexibility, and small form factor are critical.

FAQ

What is the primary function of the SI5338C-B05720-GM?

The SI5338C-B05720-GM is a quad-output, I²C-programmable clock generator that synthesizes four independent, low-jitter clock signals from a single reference. Its MultiSynth™ architecture enables any-frequency generation (0.16–710 MHz) with 0 ppm precision per output, supporting protocols including PCIe Gen1–4, Ethernet, and broadcast video. The SI5338C-B05720-GM replaces multiple discrete oscillators while maintaining strict jitter compliance.

Does the SI5338C-B05720-GM support PCIe Gen4 Common Clock compliance?

Yes, the SI5338C-B05720-GM meets PCIe Gen4 Common Clock jitter specifications with 0.15–0.45 ps RMS (10 kHz–50 MHz) when configured per Skyworks' validated settings. It is also compliant with PCIe Gen3 SRNS mode (0.11–0.32 ps RMS) and has been tested using the Intel Clock Jitter Tool and Skyworks' PCIe Clock Jitter Tool. The SI5338C-B05720-GM achieves this with its optimized PLL bandwidth (2–5 MHz) and low-noise MultiSynth™ synthesis.

Can the SI5338C-B05720-GM generate different output voltages on each channel?

Yes, the SI5338C-B05720-GM supports independent output voltage control via four dedicated VDDO pins (VDDO0–VDDO3). Each can be set to 1.5 V, 1.8 V, 2.5 V, or 3.3 V to match the logic family of the connected device - for example, 1.8 V for FPGA I/O banks and 3.3 V for legacy Ethernet PHYs. This eliminates external level shifters and simplifies power domain partitioning in the SI5338C-B05720-GM design.

How is the SI5338C-B05720-GM programmed, and what tools are required?

The SI5338C-B05720-GM is programmed via its I²C/SMBus-compatible interface using Skyworks' ClockBuilder Pro software, which provides GUI-based configuration, jitter simulation, and register file export. Programming can be done in-system or during manufacturing using standard I²C masters. The SI5338C-B05720-GM stores configuration in one-time-programmable (OTP) memory, enabling pre-programmed startup without host intervention.

What package type and thermal characteristics does the SI5338C-B05720-GM have?

The SI5338C-B05720-GM uses a 24-lead QFN package measuring 4 mm × 4 mm with 0.5 mm pitch and an exposed thermal pad. Its thermal resistance is θJA = 37 °C/W (still air) and θJC = 10 °C/W, enabling reliable operation at full load within the –40 °C to +85 °C industrial temperature range. The SI5338C-B05720-GM's 45 mA typical core supply current at 100 MHz output loading ensures efficient thermal performance in dense PCB layouts.

SI5338C-B05720-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338C-B05720-GM FAQ

1.How can I place an order for SI5338C-B05720-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338C-B05720-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338C-B05720-GM reliable?

The price and inventory of SI5338C-B05720-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338C-B05720-GM is usually 5 days.

3.What payment methods are accepted for SI5338C-B05720-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338C-B05720-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338C-B05720-GM?

SI5338C-B05720-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338C-B05720-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338C-B05720-GM?

For technical support, including SI5338C-B05720-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338C-B05720-GM requirements.

6.How does Aetrix verify that SI5338C-B05720-GM is sourced from the original manufacturer or authorized distributors?

All SI5338C-B05720-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338C-B05720-GM meets industry standards.

7.What is the process for return or replacement of SI5338C-B05720-GM?

All SI5338C-B05720-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338C-B05720-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338C-B05720-GM part is unused and in its original packaging.

Return procedure for SI5338C-B05720-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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