Skyworks Solutions Inc. SI5338C-B05953-GMR

Overview

SI5338C-B05953-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation from 1.8/2.5/3.3 V core supply. It replaces up to four crystal oscillators in high-speed serial interface timing applications such as PCIe root complexes and FPGA-based compute platforms.

For engineers reviewing the SI5338C-B05953-GMR datasheet, SI5338C-B05953-GMR pinout, SI5338C-B05953-GMR application, or SI5338C-B05953-GMR equivalent, key selection criteria include its MultiSynth™-based any-frequency synthesis (0.16–710 MHz per output), independent output voltage per driver (1.5–3.3 V), flexible reference inputs (crystal, CMOS, SSTL, differential), and programmable phase/frequency adjustment in 20 ps / 1 ppm steps.

Technical Context

The SI5338C-B05953-GMR implements a two-stage PLL architecture: a high-stability integer-N PLL (Stage 1) locks to one of six input references (IN1–IN6), followed by four independent MultiSynth™ fractional-N synthesizers (Stage 2) generating each output with zero-ppm accuracy. Its output stage supports mixed-signal formats-LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL-with per-driver VDDO control and on-chip termination.

It features loss-of-lock and loss-of-signal monitoring, I²C/SMBus-compatible configuration, external feedback for zero-delay mode, and spread-spectrum clocking (0.5–5.0% spread, 33–63 kHz modulation) on any output. The device operates across –40 to +85 °C and achieves <100 ps output-to-output skew under matched divider conditions.

Key Specifications

Pinout & Package

SI5338C-B05953-GMR is housed in a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed per the Si5338 family and validated for this variant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output programmable clock generator applications.

Compared with SI5338C-B05953-GMR, Si5338A-B-GM offers lower unit cost but forfeits field programmability and dynamic tuning, while ICS853S02IAGLF lacks synthesis capability entirely-making SI5338C-B05953-GMR the sole option for designs requiring per-output frequency, format, voltage, and phase control with PCIe Gen 4 compliance.

Availability

SI5338C-B05953-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 timing, FPGA clock tree design, and telecom synchronization applications requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for SI5338C-B05953-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs for infrastructure, automotive, and mobile markets.

The Si5338 product line delivers high-performance, software-configurable clock generation for data-intensive systems-designed specifically to replace multiple discrete oscillators and simplify timing architecture in servers, switches, and high-speed serial interface applications.

FAQ

What is the primary function of the SI5338C-B05953-GMR in a timing architecture?

The SI5338C-B05953-GMR serves as a fully programmable quad-output clock generator that synthesizes independent, low-jitter frequencies from a single reference. It replaces up to four discrete oscillators and supports PCIe Gen 1–4, Ethernet, and FPGA timing requirements. Its MultiSynth™ engine ensures zero-ppm accuracy on all outputs, and the SI5338C-B05953-GMR is configured via I²C using ClockBuilder Pro software.

Does the SI5338C-B05953-GMR support PCIe Gen 4 Common Clock compliance?

Yes, the SI5338C-B05953-GMR meets PCIe Gen 4 Common Clock RMS jitter specifications (≤0.45 ps, 10 kHz–50 MHz) when configured per Skyworks' recommended settings-including PLL bandwidth of 2–4 MHz and use of differential outputs. This compliance is verified in the official datasheet Table 12 and confirmed by measurement with the Skyworks PCIe Clock Jitter Tool.

Can the SI5338C-B05953-GMR generate different output voltages on each channel?

Yes-the SI5338C-B05953-GMR provides four independent VDDO supply pins (VDDO0–VDDO3), each configurable for 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This allows simultaneous LVDS (2.5 V), HCSL (1.8 V), and CMOS (3.3 V) outputs, enabling direct interface to mixed-voltage FPGAs or ASICs without level shifters. Each VDDO rail powers its corresponding CLKxA/CLKxB pair.

How is the SI5338C-B05953-GMR programmed and configured in-system?

The SI5338C-B05953-GMR is programmed via its I²C/SMBus-compatible interface (SCL/SDA pins) using Skyworks' ClockBuilder Pro software, which generates register maps and configuration scripts. Configuration can be stored in on-chip OTP memory for power-on initialization. The SI5338C-B05953-GMR also supports pin-controlled frequency/phase adjustments and interrupt-driven status monitoring via the INTR pin.

What package type and thermal characteristics does the SI5338C-B05953-GMR have?

The SI5338C-B05953-GMR uses a 24-pin QFN package (4 mm × 4 mm, 0.5 mm pitch) with an exposed thermal pad. Its thermal resistance is θJA = 37 °C/W (still air) and θJC = 10 °C/W, enabling reliable operation at full load across –40 to +85 °C. The package is RoHS-compliant and compatible with standard reflow profiles, including peak temperature up to 260 °C.