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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338C-B05960-GM

Name: SI5338C-B05960-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338C-B05960-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338C-B05960-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338C-B05960-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338C-B05960-GM from Skyworks Solutions is a quad-output, I²C-programmable clock generator with MultiSynth™ frequency synthesis. It delivers four independent, any-frequency outputs (0.16–710 MHz) with 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL output formats. It serves as a low-jitter replacement for up to four crystal oscillators in high-speed serial interface timing.

For engineers reviewing the SI5338C-B05960-GM datasheet, SI5338C-B05960-GM pinout, SI5338C-B05960-GM application, or SI5338C-B05960-GM equivalent, key selection criteria include PCIe Gen 4 jitter compliance (0.15–0.45 ps RMS), independent per-output voltage control (1.5/1.8/2.5/3.3 V), 4× differential output capability, 24-pin 4×4 mm QFN package, and I²C/SMBus programmability with ClockBuilder Pro software integration.

Technical Context

The SI5338C-B05960-GM implements a two-stage PLL architecture: a high-stability reference stage (with crystal or external clock input) followed by four independent MultiSynth™ fractional-N synthesis blocks. Each output path includes configurable divider chains (R/M/N/P), independent phase/frequency increment/decrement controls (<20 ps step accuracy), and selectable spread-spectrum modulation (0.5–5.0% spread, 33–63 kHz rate).

It supports flexible reference inputs: 8–30 MHz crystal, 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL, or 5–710 MHz differential. Output drivers are independently configurable for format, voltage, and enable state, with loss-of-lock and loss-of-signal alarms routed to the INTR pin.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 4 common clock jitter spec (≤0.45 ps RMS)
Output Frequency Range	0.16–710 MHz per channel; supports integer/fractional synthesis with true zero-ppm accuracy
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Output Formats	LVPECL, LVDS, HCSL, CML, CMOS, SSTL, HSTL - each output independently selectable
Supply Voltages	Core: 1.8/2.5/3.3 V; Output buffers: 1.5/1.8/2.5/3.3 V per driver - enables mixed-voltage system clocking
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch - space-efficient for dense PCB layouts
Operating Temperature	–40 °C to +85 °C - qualified for industrial and telecom line card environments

Pinout & Package

SI5338C-B05960-GM is housed in a 24-lead, 4 × 4 mm QFN package with exposed thermal pad. Pin assignments follow the standard Si5338 top-view layout: pins 1–24 include six input clocks (IN1–IN6), four differential output pairs (CLK0A/B through CLK3A/B), four independent VDDO supplies (VDDO0–VDDO3), dual-core VDD, SCL/SDA/I²C interface, INTR alarm output, and reserved ground (RSVD_GND).

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential clock inputs	Accept 5–710 MHz AC-coupled differential references; require external 100 Ω termination
IN3, IN4	Single-ended clock inputs	Support 5–200 MHz CMOS-level signals; VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A–CLK3B (x4 pairs)	Differential clock outputs	Each pair configurable as LVPECL/LVDS/HCSL/CML; independent voltage (VDDO0–VDDO3) and enable
VDDO0–VDDO3	Output buffer supply rails	Decouple noise between output domains; allow mixed-signal voltage translation (e.g., 1.8 V FPGA + 3.3 V PHY)
SCL, SDA, INTR	I²C control & status	Standard SMBus-compatible interface; INTR asserts on loss-of-lock or loss-of-signal events

Key Features

Feature	Design Value
Independent per-output voltage control	Enables simultaneous clocking of mixed-voltage devices (e.g., 1.2 V ASIC core, 1.8 V SerDes, 3.3 V legacy peripheral) without level shifters
Glitchless frequency adjustment	1 ppm step size via PINC/FDEC pins or I²C - allows real-time dynamic frequency scaling without output interruption
Programmable initial phase offset	±45 ns range with <20 ps resolution - critical for deterministic skew alignment across multi-lane interfaces (PCIe, SATA, Ethernet)
Configurable spread-spectrum clocking	0.5–5.0% down-spread at 33–63 kHz on any output - reduces EMI peak emissions in FCC/CE-constrained systems
Zero-delay mode via external feedback	Supports synchronous clock distribution with minimal propagation delay - essential for deterministic latency in packet processing and real-time control

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch Synchronization
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switch ICs in a data center fabric. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent, low-jitter (≤0.45 ps RMS) 100 MHz HCSL clocks compliant with PCIe Gen 4 Common Clock specification. Use Value: Eliminates need for four discrete oscillators; ensures sub-100 ps inter-clock skew across switch lanes, enabling full Gen 4 bandwidth and link reliability.	Use Scenario: Generating 125 MHz and 156.25 MHz clocks for 1/10 GbE PHYs and packet processors in enterprise switches. IC Role / Device Role / Timing Role: Any-frequency synthesizer producing precise Ethernet-compliant frequencies from a single 25 MHz crystal reference. Use Value: Reduces BOM count and board area; independent phase control aligns transmit/receive clock edges across ports to minimize packet jitter and buffer overflow.
Broadcast Video Frame Sync	FPGA-Based Telecom Line Card
Use Scenario: Delivering genlock-capable 74.25 MHz (HD-SDI) and 148.5 MHz (3G-SDI) clocks to video encoder/decoder FPGAs in broadcast infrastructure. IC Role / Device Role / Timing Role: Multi-format clock generator supporting LVDS and HCSL outputs with programmable phase offsets for frame-accurate synchronization. Use Value: Enables seamless switching between SDI standards without hardware change; phase adjustment compensates for trace-length mismatches across backplane routing.	Use Scenario: Supplying 155.52 MHz (OC-3), 622.08 MHz (OC-12), and 2.488 GHz (OC-48) clocks to SONET/SDH framer and SerDes ICs in carrier-grade line cards. IC Role / Device Role / Timing Role: High-stability frequency translator converting a 19.44 MHz OC-3 reference into multiple OC-n line rates using fractional synthesis. Use Value: Achieves <1 ps RMS jitter on 622.08 MHz outputs - meets Telcordia GR-1244-CORE jitter mask for OC-12 transport.

PCIe Gen 4 Switch Timing

Ethernet Switch Synchronization

Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switch ICs in a data center fabric.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent, low-jitter (≤0.45 ps RMS) 100 MHz HCSL clocks compliant with PCIe Gen 4 Common Clock specification.

Use Value: Eliminates need for four discrete oscillators; ensures sub-100 ps inter-clock skew across switch lanes, enabling full Gen 4 bandwidth and link reliability.

Use Scenario: Generating 125 MHz and 156.25 MHz clocks for 1/10 GbE PHYs and packet processors in enterprise switches.

IC Role / Device Role / Timing Role: Any-frequency synthesizer producing precise Ethernet-compliant frequencies from a single 25 MHz crystal reference.

Use Value: Reduces BOM count and board area; independent phase control aligns transmit/receive clock edges across ports to minimize packet jitter and buffer overflow.

Broadcast Video Frame Sync

FPGA-Based Telecom Line Card

Use Scenario: Delivering genlock-capable 74.25 MHz (HD-SDI) and 148.5 MHz (3G-SDI) clocks to video encoder/decoder FPGAs in broadcast infrastructure.

IC Role / Device Role / Timing Role: Multi-format clock generator supporting LVDS and HCSL outputs with programmable phase offsets for frame-accurate synchronization.

Use Value: Enables seamless switching between SDI standards without hardware change; phase adjustment compensates for trace-length mismatches across backplane routing.

Use Scenario: Supplying 155.52 MHz (OC-3), 622.08 MHz (OC-12), and 2.488 GHz (OC-48) clocks to SONET/SDH framer and SerDes ICs in carrier-grade line cards.

IC Role / Device Role / Timing Role: High-stability frequency translator converting a 19.44 MHz OC-3 reference into multiple OC-n line rates using fractional synthesis.

Use Value: Achieves <1 ps RMS jitter on 622.08 MHz outputs - meets Telcordia GR-1244-CORE jitter mask for OC-12 transport.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output programmable clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5338A-B-GM	Same silicon die; factory-programmed with fixed configuration (non-I²C reprogrammable); lacks OTP NVM flexibility	Suitable only for volume production with unchanging clock tree requirements; no field tuning capability	Select when design is finalized and cost sensitivity outweighs configurability needs
ICS8430I-01LG	Fixed 4-output LVDS generator; no I²C interface; limited frequency range (10–700 MHz); higher typical jitter (1.2 ps RMS)	Applicable only for static, non-reconfigurable clock trees where PCIe Gen 4 jitter compliance is not required	Choose only if design uses exclusively LVDS outputs and does not require spread spectrum or phase adjustment

Compared with SI5338C-B05960-GM, the Si5338A-B-GM offers lower unit cost but forfeits field programmability, while the ICS8430I-01LG lacks PCIe Gen 4 jitter performance, per-output voltage control, and I²C configurability - making SI5338C-B05960-GM the sole option supporting dynamic, multi-standard, mixed-voltage timing in next-gen infrastructure.

Availability

SI5338C-B05960-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switch synchronization, broadcast video frame sync, and FPGA-based telecom line card applications requiring stable component supply, long-term lifecycle assurance, and guaranteed traceable sourcing.

Supply support for SI5338C-B05960-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The Si5338 product line was engineered for high-performance, multi-protocol clock generation in data center, telecom, and broadcast systems - emphasizing ultra-low jitter, flexible synthesis, and robust programmability across diverse signal standards.

FAQ

What is the primary function of the SI5338C-B05960-GM in a PCIe Gen 4 system?

The SI5338C-B05960-GM serves as a quad-output common clock generator, delivering four synchronized, low-jitter (≤0.45 ps RMS) 100 MHz HCSL clocks compliant with the PCIe Gen 4 Base Specification. Its independent output configuration, phase alignment, and spread-spectrum capability ensure reliable link training and error-free operation across multiple switch or endpoint devices in the SI5338C-B05960-GM-based timing architecture.

Does the SI5338C-B05960-GM support both differential and single-ended output formats simultaneously?

Yes, the SI5338C-B05960-GM supports mixed-mode outputs: up to four differential pairs (LVPECL/LVDS/HCSL/CML) and up to eight single-ended outputs (CMOS/SSTL/HSTL), or any combination thereof. Each output driver is independently configured for format, voltage, and enable state - allowing simultaneous LVDS clocks for SerDes and CMOS clocks for microcontrollers within the same SI5338C-B05960-GM device.

How is the SI5338C-B05960-GM programmed, and what tools are required?

The SI5338C-B05960-GM is programmed via its I²C/SMBus-compatible serial interface using Skyworks' ClockBuilder Pro software. This GUI tool enables full register configuration, frequency synthesis setup, phase offset definition, spread-spectrum parameters, and output format selection. Configuration can be stored in on-chip OTP memory or loaded dynamically at boot - all supported natively for the SI5338C-B05960-GM without external firmware development.

What is the significance of the "B05960" suffix in SI5338C-B05960-GM?

The "B05960" suffix denotes a specific factory-programmed configuration variant of the SI5338C die, indicating preloaded settings for a defined set of output frequencies, formats, and control parameters. Unlike blank "C"-grade parts, SI5338C-B05960-GM ships with verified, application-optimized firmware - reducing qualification time while retaining full I²C reprogrammability for post-deployment tuning.

Can the SI5338C-B05960-GM operate in clock buffer (PLL bypass) mode, and what are its benefits?

Yes, the SI5338C-B05960-GM supports clock buffer mode, where the PLL is bypassed and input clocks are distributed directly to outputs with minimal additive jitter (0.165 ps RMS typical). This mode provides deterministic, low-latency clock forwarding - ideal for applications requiring zero-delay distribution, such as synchronous Ethernet boundary clocks or FPGA-based jitter cleaners where the SI5338C-B05960-GM preserves input signal integrity without synthesis-induced phase noise.

SI5338C-B05960-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338C-B05960-GM FAQ

1.How can I place an order for SI5338C-B05960-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338C-B05960-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338C-B05960-GM reliable?

The price and inventory of SI5338C-B05960-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338C-B05960-GM is usually 5 days.

3.What payment methods are accepted for SI5338C-B05960-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338C-B05960-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338C-B05960-GM?

SI5338C-B05960-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338C-B05960-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338C-B05960-GM?

For technical support, including SI5338C-B05960-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338C-B05960-GM requirements.

6.How does Aetrix verify that SI5338C-B05960-GM is sourced from the original manufacturer or authorized distributors?

All SI5338C-B05960-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338C-B05960-GM meets industry standards.

7.What is the process for return or replacement of SI5338C-B05960-GM?

All SI5338C-B05960-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338C-B05960-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338C-B05960-GM part is unused and in its original packaging.

Return procedure for SI5338C-B05960-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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