Skyworks Solutions Inc. SI5338C-B06043-GMR
- Part No.:
- SI5338C-B06043-GMR
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Application Specific Clock/Timing
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
SI5338C-B06043-GMR.pdf
- Description:
- I2C CONTROL, 4-OUTPUT, ANY FREQU
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI5338C-B06043-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation from 1.8/2.5/3.3 V core supply in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in Ethernet switch/router, FPGA clocking, and broadcast video timing systems.
For engineers reviewing the SI5338C-B06043-GMR datasheet, SI5338C-B06043-GMR pinout, SI5338C-B06043-GMR application, or SI5338C-B06043-GMR equivalent, key selection factors include its MultiSynth™-based any-frequency synthesis (0.16–710 MHz per output), independent output voltage per driver (1.5–3.3 V), 1 ppm frequency increment/decrement resolution, <20 ps phase step accuracy, and spread-spectrum control (0.5–5.0% deviation, 33–63 kHz modulation).
Technical Context
The SI5338C-B06043-GMR implements a two-stage PLL architecture: a high-stability integer-N Phase-Locked Loop (Stage 1) locks to one of six input references (crystal, CMOS, SSTL/HSTL, or differential), followed by four independent MultiSynth™ fractional-N synthesis blocks (Stage 2) generating each output. Each MultiSynth supports integer or fractional mode with ≤1 ppb frequency resolution.
Its output stage provides per-driver configurability for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats, independent VDDO supplies (1.4–3.63 V), and real-time dynamic adjustments via dedicated pins (PINC/FINC, OEB) or I²C-enabling glitchless frequency sweeps, programmable initial phase offset (±45 ns), and loss-of-lock/loss-of-signal alarms.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Phase Jitter (RMS) | 0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3 SRNS and GbE jitter requirements |
| Output Frequency Range | 0.16–710 MHz per channel; supports up to two >350 MHz outputs simultaneously (Fvco/4 & Fvco/6) |
| Input Reference Support | Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz) |
| Supply Voltages | Core: 1.8/2.5/3.3 V ±10%; Output buffers: 1.4–3.63 V independently per driver |
| Temperature Range | –40 °C to +85 °C ambient; qualified for industrial embedded and telecom line card use |
| Package | 24-pin QFN, 4 × 4 mm, 0.5 mm pitch; exposed thermal pad for thermal management |
| Power Consumption | 45 mA typical core current at 100 MHz on all outputs and 25 MHz reference |
Pinout & Package
SI5338C-B06043-GMR is housed in a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed across the Si5338 family and validated per Skyworks Rev. 1.6 datasheet (pages 2, 33–37).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN1, IN2, IN5, IN6 | Differential input pairs | Accept 5–710 MHz AC-coupled differential clocks; require external 100 Ω termination |
| IN3, IN4 | Single-ended input pins | Support 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL; VIH = 0.7×VDD, VIL = 0.3×VDD |
| CLK0A/CLK0B – CLK3A/CLK3B | Differential output pairs | Four independent LVPECL/LVDS/HCSL/CML outputs; each pair shares VDDOx supply |
| VDDO0–VDDO3 | Output buffer supplies | Independent 1.4–3.63 V rails per output driver group; enable mixed-voltage system interfacing |
| SCL, SDA | I²C interface | SMBus-compatible 100/400 kHz bus; supports device configuration, status readback, and dynamic tuning |
| INTR | Interrupt output | Open-drain alarm signal indicating loss-of-lock or loss-of-signal events |
| OEB, PINC, FINC | Hardware control inputs | Enable/disable outputs (OEB), perform pin-controlled frequency/phase increments (PINC/FINC) without I²C |
Key Features
| Feature | Design Value |
|---|---|
| MultiSynth™ Any-Frequency Synthesis | Four independent outputs with true zero-ppm accuracy and 1 ppb resolution per channel |
| PCIe Gen 1–4 Compliance | Meets Common Clock jitter specs (≤0.45 ps RMS for Gen 3/4) and SRNS requirements out-of-box |
| Flexible Output Configuration | Each output supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL with independent VDDO and drive strength |
| Dynamic Real-Time Tuning | Glitchless frequency adjustment in 1 ppm steps and phase shifts in <20 ps increments via hardware pins or I²C |
| Spread Spectrum Control | Configurable SSC on any output: 0.5–5.0% spread, 33–63 kHz modulation rate, selectable up/down center |
Applications
| Ethernet Switch/Router Timing | PCIe Gen 3/4 Clocking |
|---|---|
Use Scenario: High-density 1/10 GbE switching fabric requiring low-jitter, multi-frequency clock distribution across PHYs, MACs, and packet processors. IC Role / Device Role / Timing Role: Primary clock generator providing synchronous 125 MHz, 156.25 MHz, and 250 MHz clocks with deterministic skew control. Use Value: Enables simultaneous compliance with IEEE 802.3 and PCI-SIG jitter masks using a single IC, reducing BOM count and board area. |
Use Scenario: Server motherboard with multiple PCIe Gen 3/4 slots needing Common Clock architecture with strict jitter limits. IC Role / Device Role / Timing Role: PCIe reference clock source delivering 100 MHz differential HCSL with ≤0.32 ps RMS jitter (SRNS mode). Use Value: Eliminates need for discrete PCIe-compliant oscillators per slot; supports dynamic spread spectrum to reduce EMI. |
| Broadcast Video/Audio Sync | FPGA & Processor Clocking |
Use Scenario: SMPTE ST 2059-2 compliant media gateway synchronizing video, audio, and ancillary data streams over IP. IC Role / Device Role / Timing Role: Precision timing hub generating 27 MHz, 74.25 MHz, and 148.5 MHz video clocks plus AES/EBU audio clocks. Use Value: Achieves sub-20 ps inter-output skew and <1 ps RMS jitter-critical for lip-sync accuracy and frame boundary alignment. |
Use Scenario: Industrial FPGA-based controller requiring separate clocks for logic fabric, DDR interfaces, and peripheral buses (SPI/I²C/UART). IC Role / Device Role / Timing Role: Configurable clock source delivering 50 MHz CMOS for peripherals, 300 MHz LVDS for DDR, and 100 MHz LVPECL for transceivers. Use Value: Single-device solution eliminates timing mismatches between domains and simplifies power sequencing with shared VDD control. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5338A-B-GM | Same Si5338 family; differs in factory-programmed NVM configuration (default frequencies, I²C address, output formats) | Pre-configured for generic clocking; lacks B06043-specific initialization (e.g., PCIe-optimized defaults) | Select when full custom programming via ClockBuilder Pro is preferred over pre-loaded settings |
| LMK04832ISQE/NOPB | Two PLLs + eight outputs; higher integration but larger 64-QFN package; 0.18 ps RMS jitter (lower noise floor) | Targets high-end instrumentation and radar; requires more complex layout and power filtering | Choose for ultra-low jitter (<0.2 ps) or >4 output requirements; not drop-in compatible due to pin count and footprint |
Compared with SI5338C-B06043-GMR, the Si5338A-B-GM offers identical silicon and performance but requires full reconfiguration for PCIe or broadcast use cases, while the LMK04832 delivers lower jitter and more outputs at the cost of size, complexity, and non-interchangeable packaging.
Availability
SI5338C-B06043-GMR is available at Aetrix Electronics and suitable for Ethernet switch/router timing, PCIe Gen 3/4 clocking, and broadcast video/audio synchronization requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for SI5338C-B06043-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for infrastructure, automotive, and industrial markets.
The Si5338 product line delivers programmable, low-jitter clock generation for high-speed serial interfaces-including PCIe, Ethernet, and broadcast video-where precise frequency synthesis and deterministic phase control are critical.
FAQ
What is the primary function of the SI5338C-B06043-GMR?
The SI5338C-B06043-GMR is an I²C-programmable quad clock generator that synthesizes up to four independent, low-jitter output frequencies from a single reference input. It replaces multiple fixed-frequency oscillators in systems requiring flexible, high-precision timing-such as PCIe root complexes, Ethernet switches, and broadcast video equipment-while supporting zero-ppm accuracy and real-time frequency/phase tuning.
Does the SI5338C-B06043-GMR support PCIe Gen 4 Common Clock compliance?
Yes, the SI5338C-B06043-GMR meets PCIe Gen 4 Common Clock jitter specifications with ≤0.45 ps RMS (12 kHz–20 MHz) when configured per Skyworks application note AN562. Its design includes optimized PLL loop bandwidth (2–5 MHz) and supports the required CDR filter profile, verified using the Skyworks PCIe Clock Jitter Tool and Intel Clock Jitter Tool v1.6.4.
How many output formats does the SI5338C-B06043-GMR support per channel?
The SI5338C-B06043-GMR supports five output signal formats per channel: LVPECL, LVDS, HCSL, CMOS, SSTL, and HSTL. Each output driver is independently configurable for format, frequency, voltage level (1.5/1.8/2.5/3.3 V), and termination-enabling mixed-signal interfacing across FPGAs, ASICs, and memory controllers without external level shifters.
Can the SI5338C-B06043-GMR generate frequencies above 350 MHz?
Yes, the SI5338C-B06043-GMR supports output frequencies up to 710 MHz, but only two unique frequencies above 350 MHz may be active simultaneously-specifically Fvco/4 and Fvco/6-as defined by the MultiSynth™ architecture. Higher frequencies require integer-mode synthesis and appropriate VCO calibration; operation beyond 350 MHz mandates differential output formats (LVPECL/LVDS/HCSL/CML).
What software tools are required to configure the SI5338C-B06043-GMR?
Configuration of the SI5338C-B06043-GMR is performed using Skyworks' ClockBuilder Pro software-a free, GUI-based tool that generates register maps, validates timing constraints, and exports configuration files for production programming. The tool supports I²C communication via USB-to-I²C adapters and includes built-in PCIe, Ethernet, and broadcast video templates aligned with the SI5338C-B06043-GMR's factory-programmed defaults.
SI5338C-B06043-GMR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- MultiSynth™
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- PLL:
- -
- Main Purpose:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 24-QFN (4x4)
SI5338C-B06043-GMR FAQ
1.How can I place an order for SI5338C-B06043-GMR through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5338C-B06043-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5338C-B06043-GMR reliable?
The price and inventory of SI5338C-B06043-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338C-B06043-GMR is usually 5 days.
3.What payment methods are accepted for SI5338C-B06043-GMR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338C-B06043-GMR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5338C-B06043-GMR?
SI5338C-B06043-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5338C-B06043-GMR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5338C-B06043-GMR?
For technical support, including SI5338C-B06043-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338C-B06043-GMR requirements.
6.How does Aetrix verify that SI5338C-B06043-GMR is sourced from the original manufacturer or authorized distributors?
All SI5338C-B06043-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338C-B06043-GMR meets industry standards.
7.What is the process for return or replacement of SI5338C-B06043-GMR?
All SI5338C-B06043-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338C-B06043-GMR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5338C-B06043-GMR part is unused and in its original packaging.
Return procedure for SI5338C-B06043-GMR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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