Skyworks Solutions Inc. SI5338C-B06074-GM

Overview

SI5338C-B06074-GM from Skyworks Solutions is a quad-output, I²C-programmable clock generator with MultiSynth™ frequency synthesis. It delivers four independent, any-frequency clocks (0.16–710 MHz) with 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 compliance, and support for LVPECL/LVDS/HCSL/CMOS/SSTL outputs. It replaces up to four crystal oscillators in FPGA, processor, and Ethernet switch timing applications.

For engineers reviewing the SI5338C-B06074-GM datasheet, SI5338C-B06074-GM pinout, SI5338C-B06074-GM application, or SI5338C-B06074-GM equivalent, key selection criteria include differential output jitter performance (0.7 ps RMS), PCIe Gen 4 SRNS compliance, independent per-output voltage control (1.5/1.8/2.5/3.3 V), 4×4 mm 24-QFN package, and I²C/SMBus programmability with ClockBuilder Pro software integration.

Technical Context

The SI5338C-B06074-GM implements a two-stage PLL architecture: a high-stability reference stage (with crystal or external clock input) followed by four independent MultiSynth™ fractional-N synthesizers. Each synthesizer drives one of four configurable output drivers, enabling integer- or fractional-mode synthesis with true zero-ppm accuracy across all outputs.

It supports flexible input references - including 8–30 MHz crystals, 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL, and 5–710 MHz differential inputs - and provides independent output configuration per channel for format, voltage, spread spectrum, phase offset (±45 ns), and frequency increment/decrement (1 ppm steps).

Key Specifications

Pinout & Package

SI5338C-B06074-GM uses a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with an exposed thermal pad. Pin assignments are fixed per the Si5338 family and validated for this variant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output programmable clock generator applications.

Compared with Si5338A-B06074-GM, the SI5338C-B06074-GM offers identical hardware functionality but different factory OTP settings; compared with LMK04832RHAR, it trades jitter cleaning capability and JESD204B features for lower power, smaller footprint, and PCIe-optimized jitter performance.

Availability

SI5338C-B06074-GM is available at Aetrix Electronics and suitable for Ethernet switch/router, PCIe Gen 4 server motherboard, and broadcast video timing applications requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for SI5338C-B06074-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 product line was designed as a highly configurable, low-jitter clock generator family targeting high-speed digital systems-including PCIe, Ethernet, and broadcast video-where multi-frequency synthesis, small footprint, and software programmability are essential.

FAQ

What is the primary function of the SI5338C-B06074-GM in a timing architecture?

The SI5338C-B06074-GM serves as a quad-output, I²C-programmable clock generator that synthesizes four independent, any-frequency clocks (0.16–710 MHz) with ultra-low jitter (0.7 ps RMS). It replaces multiple discrete oscillators in systems like PCIe servers and Ethernet switches, delivering precise, configurable timing from a single 4×4 mm QFN package. Its MultiSynth™ technology ensures zero-ppm accuracy on all outputs.

Does the SI5338C-B06074-GM support PCIe Gen 4 timing requirements?

Yes, the SI5338C-B06074-GM is explicitly compliant with PCIe Gen 4 Common Clock and Separate Reference No Spread (SRNS) specifications, achieving 0.15–0.45 ps RMS jitter under defined test conditions. It meets JEDEC JESD204B and Intel Clock Jitter Tool v1.6.4 validation requirements when configured per Skyworks AN562 guidelines and using differential outputs (e.g., HCSL at 100 MHz).

How is the SI5338C-B06074-GM programmed and configured?

The SI5338C-B06074-GM is programmed via its I²C/SMBus-compatible interface (SCL/SDA pins) using Skyworks' ClockBuilder Pro software. This GUI tool enables full register configuration-including output frequencies, formats, voltages, spread spectrum, phase offsets, and alarm thresholds-and generates custom configuration files. Factory OTP memory retains settings across power cycles, eliminating boot-time programming overhead for the SI5338C-B06074-GM.

What input reference sources does the SI5338C-B06074-GM accept?

The SI5338C-B06074-GM accepts multiple reference types: an 8–30 MHz fundamental-mode crystal (directly connected to IN1/IN2), a 5–200 MHz CMOS clock (on IN3/IN4), or differential inputs up to 710 MHz (on IN1/IN2 or IN5/IN6). Input flexibility allows use in free-running, frequency-translating, or zero-delay buffer modes-enabling deployment across diverse timing architectures without redesign.

Can the SI5338C-B06074-GM generate different output voltage levels simultaneously?

Yes, the SI5338C-B06074-GM supports independent output buffer supply voltages (VDDO0–VDDO3), allowing simultaneous generation of LVPECL (3.3 V), LVDS (2.5 V), HCSL (1.8 V), and CMOS (1.5 V) signals from a single device. Each output pair is isolated electrically and configurable via registers, enabling direct interfacing with mixed-voltage FPGAs, ASICs, and SERDES without level-shifting components.