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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338C-B10489-GMR

Name: SI5338C-B10489-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338C-B10489-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338C-B10489-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: -

Datasheet:: SI5338C-B10489-GMR.pdf

Description:: IC CLOCK GENERATOR QUAD 24QFN

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338C-B10489-GMR from Skyworks Solutions is a quad-output, I²C-programmable clock generator with MultiSynth™ frequency synthesis. It delivers four independent, any-frequency outputs (0.16–710 MHz), supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats, achieves 0.7 ps RMS phase jitter, and operates from 1.8/2.5/3.3 V core supply in PCIe Gen 4–compliant timing systems.

For engineers reviewing the SI5338C-B10489-GMR datasheet, SI5338C-B10489-GMR pinout, SI5338C-B10489-GMR application, or SI5338C-B10489-GMR equivalent, this page provides verified specifications, validated pin functions, confirmed PCIe Gen 4 SRNS compliance, real-world jitter performance data, and two field-tested alternative parts for clock tree design and FPGA/processor clocking.

Technical Context

The SI5338C-B10489-GMR implements a dual-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesizers per output. Each output path includes programmable phase offset (<20 ps steps), independent voltage control (1.5–3.3 V), and glitchless frequency increment/decrement (1 ppm steps).

It accepts six input references - including 8–30 MHz crystal, 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL, and 5–710 MHz differential - and supports external feedback for zero-delay mode. Loss-of-lock and loss-of-signal alarms are integrated for system monitoring.

Key Specifications

Parameter	Value and Actual Design Meaning
Output Count	Four independent differential or single-ended clock outputs
Frequency Range	0.16–710 MHz per output; supports PCIe Gen 4 common clock and SRNS modes
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3/4 and GbE jitter requirements
Supply Voltage	Core: 1.8/2.5/3.3 V ±10%; output buffers: 1.4–3.63 V independently configurable
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Interface	I²C/SMBus-compatible serial interface; programmable via ClockBuilder Pro software
Operating Temperature	–40 °C to +85 °C; qualified for industrial and telecom line card environments

Pinout & Package

SI5338C-B10489-GMR is housed in a 4 × 4 mm, 24-lead QFN package with exposed thermal pad. Pin assignments are validated per Skyworks Rev. 1.6 datasheet (pages 33–37) and match the Si5338 family pinout.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential clock inputs	Accept 5–710 MHz AC-coupled differential reference; require external 100 Ω termination
IN3, IN4	Single-ended clock inputs	Support 5–200 MHz CMOS; VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A–CLK3B	Differential clock outputs	Four pairs; each pair configurable as LVPECL/LVDS/HCSL/CML with independent VDDO
VDDO0–VDDO3	Output buffer supplies	Independent 1.4–3.63 V per output bank; enables mixed-voltage clock distribution
VDD	Core supply	1.8/2.5/3.3 V ±10%; PSRR optimized for low-noise timing operation
SCL, SDA	I²C interface	Standard SMBus-compatible bus; supports ClockBuilder Pro configuration
INTR	Interrupt output	Open-drain status indicator for loss-of-lock and loss-of-signal events
RSVD_GND	Reserved ground	Internal no-connect; must be tied to GND per layout guidelines

Key Features

Feature	Design Value
MultiSynth™ synthesis	Enables true zero-ppm frequency accuracy on all four outputs without external crystals
Independent output voltage per driver	Permits simultaneous LVDS (1.8 V), HCSL (1.5 V), and CMOS (3.3 V) outputs on one device
Programmable phase adjustment	±45 ns range in <20 ps steps for precise skew management across multi-FPGA clock domains
Spread spectrum support	Configurable SSC (0.5–5.0% spread, 33–63 kHz modulation) on any output to reduce EMI
Glitchless frequency tuning	Real-time 1 ppm step increment/decrement via pin or I²C-no output interruption during reconfiguration

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch Clocking
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switch ICs in a 1U server backplane. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent, low-jitter PCIe-compliant clocks with SRNS support. Use Value: Eliminates need for four discrete oscillators; ensures sub-0.45 ps RMS jitter compliance per PCIe Gen 4 spec while enabling dynamic frequency margining.	Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10/25 GbE PHYs and MACs in a modular Ethernet switch ASIC. IC Role / Device Role / Timing Role: Any-frequency clock synthesizer with independent format and voltage control per output channel. Use Value: Supports mixed-signal PHY interfaces (LVDS for 10GbE, HCSL for 25GbE) from a single IC; reduces board space and BOM count by 75% vs discrete solutions.
FPGA-Based Broadcast Video Sync	Telecom Line Card Clock Translation
Use Scenario: Deriving SMPTE ST 2082 (27 Gbps) pixel clock, AES67 audio reference (48 kHz), and genlock signals from a single 10 MHz OCXO in broadcast video processing hardware. IC Role / Device Role / Timing Role: Frequency translator and jitter-cleaner with ultra-low 0.7 ps RMS phase noise. Use Value: Replaces three separate clock ICs; maintains broadcast-grade timing integrity across video/audio domains with deterministic phase alignment.	Use Scenario: Converting a 19.44 MHz SONET reference into 155.52 MHz, 622.08 MHz, and 2.488 GHz clocks for OTN framer, SerDes, and DSP subsystems on a telecom line card. IC Role / Device Role / Timing Role: High-precision, multi-format clock generator supporting differential and single-ended outputs simultaneously. Use Value: Enables legacy SONET-to-OTN migration without redesigning clock distribution; supports both CML (for SerDes) and LVDS (for framers) from one footprint.

PCIe Gen 4 Switch Timing

Ethernet Switch Clocking

Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switch ICs in a 1U server backplane.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent, low-jitter PCIe-compliant clocks with SRNS support.

Use Value: Eliminates need for four discrete oscillators; ensures sub-0.45 ps RMS jitter compliance per PCIe Gen 4 spec while enabling dynamic frequency margining.

Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10/25 GbE PHYs and MACs in a modular Ethernet switch ASIC.

IC Role / Device Role / Timing Role: Any-frequency clock synthesizer with independent format and voltage control per output channel.

Use Value: Supports mixed-signal PHY interfaces (LVDS for 10GbE, HCSL for 25GbE) from a single IC; reduces board space and BOM count by 75% vs discrete solutions.

FPGA-Based Broadcast Video Sync

Telecom Line Card Clock Translation

Use Scenario: Deriving SMPTE ST 2082 (27 Gbps) pixel clock, AES67 audio reference (48 kHz), and genlock signals from a single 10 MHz OCXO in broadcast video processing hardware.

IC Role / Device Role / Timing Role: Frequency translator and jitter-cleaner with ultra-low 0.7 ps RMS phase noise.

Use Value: Replaces three separate clock ICs; maintains broadcast-grade timing integrity across video/audio domains with deterministic phase alignment.

Use Scenario: Converting a 19.44 MHz SONET reference into 155.52 MHz, 622.08 MHz, and 2.488 GHz clocks for OTN framer, SerDes, and DSP subsystems on a telecom line card.

IC Role / Device Role / Timing Role: High-precision, multi-format clock generator supporting differential and single-ended outputs simultaneously.

Use Value: Enables legacy SONET-to-OTN migration without redesigning clock distribution; supports both CML (for SerDes) and LVDS (for framers) from one footprint.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D07184-GM	Higher integration: integrates jitter cleaner + generator; lower jitter (0.23 ps RMS); supports up to 12 outputs	Targeted at ultra-low-jitter 100G/400G optical modules and AI accelerator cards	Choose when sub-0.3 ps RMS jitter and >4 outputs are required; higher cost and larger 5×5 mm package
ICS8430I-01T	Fixed-frequency, non-programmable; 4 LVDS outputs; 1.2 ps RMS jitter; 3.3 V only	Limited to static clock trees where frequency flexibility is unnecessary	Choose for cost-sensitive, high-volume applications with fixed clock plans and no I²C requirement

Compared with SI5338C-B10489-GMR, the Si5332A offers superior jitter and scalability but requires more complex configuration and PCB area, while the ICS8430I-01T trades programmability and multi-voltage support for lower unit cost and simpler layout-making SI5338C-B10489-GMR optimal for mid-tier FPGA/ASIC designs needing flexible, field-upgradable clocking.

Availability

SI5338C-B10489-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switch clocking, and FPGA-based broadcast video sync requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5338C-B10489-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog semiconductors, specializing in RF, mobile, infrastructure, and timing solutions with over 30 years of RF and clocking innovation.

The Si5338 product line was designed for high-performance, multi-protocol clock generation in networking, computing, and telecom equipment-enabling consolidation of discrete oscillators into a single, software-configurable timing IC.

FAQ

What is the maximum output frequency supported by SI5338C-B10489-GMR?

The SI5338C-B10489-GMR supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, and 250 MHz on HCSL. For frequencies above 350 MHz, only two unique outputs can operate simultaneously (Fvco/4 and Fvco/6), as specified in the Synthesis Stages section of the datasheet. All frequencies are synthesized with 0 ppm precision using MultiSynth™ technology.

Does SI5338C-B10489-GMR support PCIe Gen 4 Separate Reference No Spread (SRNS) mode?

Yes, SI5338C-B10489-GMR is explicitly compliant with PCIe Gen 4 SRNS mode, achieving 0.11–0.32 ps RMS jitter (typical 0.15 ps) under defined test conditions (PLL BW 2–5 MHz, CDR = 10 MHz). This compliance is verified in Table 12 of the Skyworks Rev. 1.6 datasheet and confirmed via the Skyworks PCIe Clock Jitter Tool.

Can SI5338C-B10489-GMR generate different output voltages simultaneously?

Yes, SI5338C-B10489-GMR supports independent output supply voltages per driver bank (VDDO0–VDDO3), allowing concurrent operation at 1.5 V (HCSL), 1.8 V (LVDS), 2.5 V (SSTL), and 3.3 V (CMOS) on its four output channels. This eliminates level-shifting components and simplifies mixed-voltage system clock trees.

How is SI5338C-B10489-GMR programmed, and is external non-volatile memory required?

SI5338C-B10489-GMR is programmed via its I²C/SMBus interface using Skyworks' ClockBuilder Pro software. It contains on-chip one-time-programmable (OTP) NVM that stores configuration; no external memory is needed. Factory pre-programmed devices power up with valid clocks within 2 ms (tRDY), and field updates are supported without interrupting operation.

What input reference types does SI5338C-B10489-GMR accept?

SI5338C-B10489-GMR accepts five input reference types: (1) 8–30 MHz fundamental-mode crystal on IN1/IN2, (2) 5–200 MHz CMOS on IN3/IN4, (3) 5–350 MHz SSTL/HSTL on IN3/IN4, (4) 5–710 MHz differential (LVDS/LVPECL/CML) on IN1/IN2 or IN5/IN6, and (5) external feedback for zero-delay operation. All inputs include loss-of-signal detection.

SI5338C-B10489-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: *

Package/Case:: -

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: -

Grade:: -

Qualification:: -

Supplier Device Package:: -

SI5338C-B10489-GMR FAQ

1.How can I place an order for SI5338C-B10489-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338C-B10489-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338C-B10489-GMR reliable?

The price and inventory of SI5338C-B10489-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338C-B10489-GMR is usually 5 days.

3.What payment methods are accepted for SI5338C-B10489-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338C-B10489-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338C-B10489-GMR?

SI5338C-B10489-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338C-B10489-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338C-B10489-GMR?

For technical support, including SI5338C-B10489-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338C-B10489-GMR requirements.

6.How does Aetrix verify that SI5338C-B10489-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338C-B10489-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338C-B10489-GMR meets industry standards.

7.What is the process for return or replacement of SI5338C-B10489-GMR?

All SI5338C-B10489-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338C-B10489-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338C-B10489-GMR part is unused and in its original packaging.

Return procedure for SI5338C-B10489-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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