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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338C-B10647-GM

Name: SI5338C-B10647-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338C-B10647-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338C-B10647-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: -

Datasheet:: SI5338C-B10647-GM.pdf

Description:: IC CLOCK GENERATOR QUAD 24QFN

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Product details

Overview

SI5338C-B10647-GM from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C. It replaces up to four crystal oscillators in high-speed serial interface timing applications such as PCIe root complexes and FPGA clock trees.

For engineers reviewing the SI5338C-B10647-GM datasheet, SI5338C-B10647-GM pinout, SI5338C-B10647-GM application, or SI5338C-B10647-GM equivalent, key selection criteria include its MultiSynth™ fractional-N synthesis architecture, independent output voltage per driver (1.5/1.8/2.5/3.3 V), 0 ppm frequency accuracy on all outputs, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats up to 710 MHz.

Technical Context

The SI5338C-B10647-GM implements a two-stage PLL architecture: a high-stability reference stage (Stage 1) followed by four independent MultiSynth™ fractional-N synthesis blocks (Stage 2), each driving one output pair. This enables true any-frequency synthesis with integer- or fractional-N division and zero-ppm accuracy across all four outputs.

It supports flexible input references including external crystals (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), and differential inputs (5–710 MHz). Output drivers are fully independent-each configurable for format, voltage, spread spectrum, phase offset (<20 ps step), and frequency increment/decrement (1 ppm steps).

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typ (12 kHz–20 MHz); meets PCIe Gen 3 SRNS & Gen 4 common clock jitter requirements
Output Frequency Range	0.16–710 MHz per output; supports LVPECL/LVDS up to 710 MHz, HCSL up to 250 MHz, CMOS up to 200 MHz
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Supply Voltages	Core: 1.8/2.5/3.3 V; Output buffers: independently selectable 1.5/1.8/2.5/3.3 V per driver
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch; RoHS-compliant, moisture sensitivity level 3
Operating Temperature	–40 to +85 °C ambient; qualified per industrial-grade reliability standards
Power Consumption	45 mA typ core supply current at 100 MHz on all outputs with 25 MHz reference

Pinout & Package

The SI5338C-B10647-GM is housed in a 24-pin, 4 × 4 mm QFN package with exposed thermal pad. Pin 1 is located at top-left corner (marked by dot), and pin numbering proceeds counterclockwise.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2	Differential input clock pair	Accepts AC-coupled differential reference (5–710 MHz); internal 100 Ω termination enabled
CLK0A, CLK0B	Differential output pair 0	Configurable format (LVPECL/LVDS/HCSL/CML); independent voltage (VDDO0) and enable control
CLK1A, CLK1B	Differential output pair 1	Independent MultiSynth™ channel; supports programmable phase offset (±45 ns) and SSC
VDDO0–VDDO3	Output buffer supply rails	Each powers one output pair; allows mixed-voltage operation (e.g., LVDS @ 2.5 V, HCSL @ 1.8 V)
SCL, SDA	I²C/SMBus interface	Standard 100/400 kHz operation; supports write-only configuration and readback of status registers
INTR	Interrupt output	Open-drain alarm signal for loss-of-lock (LOL) and loss-of-signal (LOS); active-low assertion

Key Features

Feature	Design Value
MultiSynth™ synthesis	Four independent fractional-N synthesizers enabling simultaneous any-frequency outputs with 0 ppm error
PCIe compliance	Fully compliant with PCIe Gen 1/2/3/4 Common Clock and Gen 3 Separate Reference No Spread (SRNS)
Flexible output configuration	Per-output selection of format (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL), voltage (1.5–3.3 V), and drive strength
Glitchless frequency tuning	Hardware-supported frequency increment/decrement via PINC/FDEC pins in 1 ppm steps without output interruption
Programmable spread spectrum	Per-output SSC with adjustable spread (0.5–5.0%), modulation rate (33–63 kHz), and center/down-spread mode
Phase adjustment resolution	Independent <20 ps step phase offset on each output; ±45 ns total range for skew calibration

Applications

PCIe Gen 4 Root Complex Timing	FPGA High-Speed Transceiver Clocking
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 endpoints and switch fabric in server backplanes. IC Role / Device Role / Timing Role: Quad-output clock generator delivering low-jitter, spread-spectrum-enabled clocks meeting PCIe Gen 4 common clock jitter limits (≤0.45 ps RMS). Use Value: Eliminates need for four discrete oscillators; enables single-point jitter optimization and dynamic frequency margining via I²C.	Use Scenario: Supplying independent transceiver reference clocks (e.g., 125 MHz, 156.25 MHz, 250 MHz, 500 MHz) to multi-gigabit SerDes lanes in Xilinx Versal or Intel Agilex FPGAs. IC Role / Device Role / Timing Role: Any-frequency synthesizer generating precise, phase-aligned clocks for GTY/GTP/GTX and hardened PHY blocks. Use Value: Supports mixed-rate SerDes banks with sub-20 ps inter-output skew and hardware-assisted phase alignment.
Ethernet Switch Line Card	Broadcast Video Master Timing
Use Scenario: Generating 125 MHz, 156.25 MHz, 312.5 MHz, and 625 MHz clocks for 1G/10G/25G/100G Ethernet PHYs and packet processors on telecom line cards. IC Role / Device Role / Timing Role: Configurable clock source supporting IEEE 1588 PTP grandmaster synchronization and deterministic latency paths. Use Value: Enables single-chip timing for multi-rate Ethernet interfaces with programmable SSC to reduce EMI in dense PCB layouts.	Use Scenario: Distributing frame-synchronized 27 MHz, 74.25 MHz, 148.5 MHz, and 297 MHz clocks across SDI video encoders, decoders, and color correctors in broadcast production switchers. IC Role / Device Role / Timing Role: Broadcast-grade timing generator meeting SMPTE ST 2059-2 PTP profile and AES11 jitter requirements. Use Value: Delivers <1 ps RMS jitter on 27 MHz outputs and supports genlock via external feedback mode for zero-delay operation.

PCIe Gen 4 Root Complex Timing

FPGA High-Speed Transceiver Clocking

Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 endpoints and switch fabric in server backplanes.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering low-jitter, spread-spectrum-enabled clocks meeting PCIe Gen 4 common clock jitter limits (≤0.45 ps RMS).

Use Value: Eliminates need for four discrete oscillators; enables single-point jitter optimization and dynamic frequency margining via I²C.

Use Scenario: Supplying independent transceiver reference clocks (e.g., 125 MHz, 156.25 MHz, 250 MHz, 500 MHz) to multi-gigabit SerDes lanes in Xilinx Versal or Intel Agilex FPGAs.

IC Role / Device Role / Timing Role: Any-frequency synthesizer generating precise, phase-aligned clocks for GTY/GTP/GTX and hardened PHY blocks.

Use Value: Supports mixed-rate SerDes banks with sub-20 ps inter-output skew and hardware-assisted phase alignment.

Ethernet Switch Line Card

Broadcast Video Master Timing

Use Scenario: Generating 125 MHz, 156.25 MHz, 312.5 MHz, and 625 MHz clocks for 1G/10G/25G/100G Ethernet PHYs and packet processors on telecom line cards.

IC Role / Device Role / Timing Role: Configurable clock source supporting IEEE 1588 PTP grandmaster synchronization and deterministic latency paths.

Use Value: Enables single-chip timing for multi-rate Ethernet interfaces with programmable SSC to reduce EMI in dense PCB layouts.

Use Scenario: Distributing frame-synchronized 27 MHz, 74.25 MHz, 148.5 MHz, and 297 MHz clocks across SDI video encoders, decoders, and color correctors in broadcast production switchers.

IC Role / Device Role / Timing Role: Broadcast-grade timing generator meeting SMPTE ST 2059-2 PTP profile and AES11 jitter requirements.

Use Value: Delivers <1 ps RMS jitter on 27 MHz outputs and supports genlock via external feedback mode for zero-delay operation.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5338A-B-GM	Same die, factory-programmed with fixed configuration; no I²C reprogrammability after power-up	Limited to pre-defined frequency sets; unsuitable for field-upgradable or multi-configurable systems	Select SI5338C-B10647-GM when runtime reconfiguration, dynamic frequency tuning, or custom output combinations are required.
LMK04832RHAR	Two PLLs (not four independent synthesizers); higher power (120 mA typ); larger 48-QFN package	Optimized for ultra-low jitter (<0.1 ps RMS) in RF sampling; less flexible for mixed-format, multi-frequency use cases	Choose SI5338C-B10647-GM for space-constrained designs needing four independent, software-tunable outputs with lower power and smaller footprint.

Compared with Si5338A-B-GM and LMK04832RHAR, the SI5338C-B10647-GM uniquely combines full I²C programmability, four independent MultiSynth™ engines, 4×4 mm QFN packaging, and PCIe Gen 4 compliance - making it optimal for compact, multi-protocol embedded timing where flexibility and board area matter.

Availability

SI5338C-B10647-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 server platforms, FPGA-based high-speed data acquisition systems, and broadcast video infrastructure requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5338C-B10647-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog semiconductors, specializing in RF, timing, and precision analog solutions for communications, automotive, and industrial markets.

The Si5338 family was designed specifically for high-performance, software-defined clock generation in multi-protocol serial interfaces - enabling replacement of multiple discrete oscillators while maintaining sub-picosecond jitter and PCIe/10GbE/SMPTE compliance.

FAQ

What is the primary function of the SI5338C-B10647-GM?

The SI5338C-B10647-GM is an I²C-programmable quad clock generator that synthesizes four independent, low-jitter output frequencies from a single reference input. Its MultiSynth™ architecture enables true any-frequency generation (0.16–710 MHz) with 0 ppm accuracy, supporting PCIe Gen 1–4, Ethernet, FPGA, and broadcast video timing applications. The SI5338C-B10647-GM integrates all necessary PLLs, dividers, and configurable output drivers in a single 4 × 4 mm QFN package.

Does the SI5338C-B10647-GM support PCIe Gen 4 timing requirements?

Yes, the SI5338C-B10647-GM meets PCIe Gen 4 common clock jitter specifications (≤0.45 ps RMS, 10 kHz–50 MHz) when configured per Skyworks' recommended settings - including PLL bandwidth of 2–4 MHz and CDR = 10 MHz. It is explicitly validated for PCIe Gen 4 in the official datasheet (Rev. 1.6, Table 12), and its jitter performance is verified using the Skyworks PCIe Clock Jitter Tool. The SI5338C-B10647-GM also supports Gen 3 SRNS mode.

Can the SI5338C-B10647-GM generate different output voltages simultaneously?

Yes, the SI5338C-B10647-GM supports independent output buffer supply voltages (VDDO0–VDDO3), allowing simultaneous operation of different output formats at different voltages - for example, LVDS at 2.5 V on CLK0A/B, HCSL at 1.8 V on CLK1A/B, and CMOS at 3.3 V on CLK2A/B. Each VDDO rail powers one output pair and must be externally supplied within 1.4–3.63 V. This capability is confirmed in the "Output Buffer Supply Voltage" specification (Table 1) and functional description (Section 3.4).

How is the SI5338C-B10647-GM programmed and configured?

The SI5338C-B10647-GM is programmed via its I²C/SMBus-compatible serial interface (SCL/SDA pins) using Skyworks' ClockBuilder Pro software, which generates register maps and configuration files. Configuration includes output frequencies, formats, voltages, spread spectrum settings, phase offsets, and alarm thresholds. Factory OTP memory stores default settings, but full runtime reprogramming is supported. The SI5338C-B10647-GM does not require external configuration EEPROM.

What package type and pin count does the SI5338C-B10647-GM use?

The SI5338C-B10647-GM uses a 24-pin QFN package measuring 4 × 4 mm with 0.5 mm pitch and an exposed thermal pad. Pin assignments are standardized across the Si5338 family and documented in Section 8 ("Device Pinout by Part Number") of the datasheet. The package is RoHS-compliant, moisture sensitivity level 3, and compatible with standard reflow profiles per JEDEC J-STD-020.

SI5338C-B10647-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: *

Package/Case:: -

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: -

Grade:: -

Qualification:: -

Supplier Device Package:: -

SI5338C-B10647-GM FAQ

1.How can I place an order for SI5338C-B10647-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338C-B10647-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338C-B10647-GM reliable?

The price and inventory of SI5338C-B10647-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338C-B10647-GM is usually 5 days.

3.What payment methods are accepted for SI5338C-B10647-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338C-B10647-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338C-B10647-GM?

SI5338C-B10647-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338C-B10647-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338C-B10647-GM?

For technical support, including SI5338C-B10647-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338C-B10647-GM requirements.

6.How does Aetrix verify that SI5338C-B10647-GM is sourced from the original manufacturer or authorized distributors?

All SI5338C-B10647-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338C-B10647-GM meets industry standards.

7.What is the process for return or replacement of SI5338C-B10647-GM?

All SI5338C-B10647-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338C-B10647-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338C-B10647-GM part is unused and in its original packaging.

Return procedure for SI5338C-B10647-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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