Skyworks Solutions Inc. SI5338C-B11301-GMR

Overview

SI5338C-B11301-GMR from Skyworks Solutions is a quad-output, I²C-programmable clock generator with MultiSynth™ frequency synthesis. It delivers four independent, any-frequency outputs (0.16–710 MHz) with 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338C-B11301-GMR datasheet, SI5338C-B11301-GMR pinout, SI5338C-B11301-GMR application, or SI5338C-B11301-GMR equivalent, key selection criteria include differential output jitter performance at 100 MHz HCSL (0.15–0.45 ps RMS for PCIe Gen 3/4), independent per-output voltage control (1.5/1.8/2.5/3.3 V), and programmable phase/frequency adjustment in <20 ps / 1 ppm steps.

Technical Context

The SI5338C-B11301-GMR implements a two-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesis blocks. Each output driver is fully configurable for format, voltage, and termination, enabling mixed-signal clock trees without external level translation.

It supports flexible reference inputs - including 8–30 MHz crystals, 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL, and 5–710 MHz differential - and features loss-of-lock and loss-of-signal alarms, spread-spectrum modulation (0.5–5.0% spread, 33–63 kHz rate), and zero-delay mode via external feedback.

Key Specifications

Pinout & Package

SI5338C-B11301-GMR uses a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed across Si5338 family variants; this part shares identical pinout with Si5338B/C/D versions.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output clock generator applications.

Compared with Si5338A-B11301-GMR, the SI5338C-B11301-GMR offers identical hardware functionality but distinct factory NVM settings; versus LMK04832RHAT, it trades lower jitter and more outputs for smaller size, spread-spectrum support, and independent VDDO control-making it optimal for space-constrained PCIe and Ethernet platforms.

Availability

SI5338C-B11301-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 root complexes, 10 GbE switch timing, broadcast video sync generation, and FPGA clock tree applications requiring stable component supply, long-term lifecycle support, and consistent factory programming.

Supply support for SI5338C-B11301-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 product line delivers highly configurable, low-jitter clock generators targeting high-speed serial interface timing-including PCIe, Ethernet, Fibre Channel, and broadcast video-where precision, flexibility, and small form factor are critical.

FAQ

What is the factory-programmed configuration of the SI5338C-B11301-GMR?

The SI5338C-B11301-GMR ships with non-volatile memory (NVM) pre-programmed for a specific output configuration: four differential outputs with defined frequencies, formats, and voltage levels. This configuration is fixed at manufacture and can be reprogrammed in-system via I²C using ClockBuilder Pro software. The "C" suffix denotes a particular factory configuration variant within the Si5338 family, distinct from A/B/D versions.

Does the SI5338C-B11301-GMR support PCIe Gen 4 Separate Reference No Spread (SRNS) mode?

Yes, the SI5338C-B11301-GMR supports PCIe Gen 4 SRNS mode with 0.15–0.45 ps RMS jitter (12 kHz–20 MHz), meeting PCI-SIG specification requirements. It achieves this using a PLL bandwidth of 2–4 MHz or 2–5 MHz with a 10 MHz CDR filter. Configuration requires setting appropriate MultiSynth™ dividers and disabling spread-spectrum modulation via I²C registers.

Can the SI5338C-B11301-GMR generate both differential and single-ended outputs simultaneously?

Yes, the SI5338C-B11301-GMR supports mixed-mode operation: up to four differential outputs (CLK0A/B through CLK3A/B) and up to eight single-ended outputs (by configuring individual legs of differential pairs as CMOS/SSTL/HSTL), or any combination thereof. Each output leg is independently configurable for format, frequency, and voltage, enabling heterogeneous clock distribution from a single IC.

What is the minimum input clock frequency supported by the SI5338C-B11301-GMR in PLL bypass (buffer) mode?

In PLL bypass (clock buffer) mode, the SI5338C-B11301-GMR supports input frequencies as low as 1 MHz on single-ended inputs (IN3/IN4) and 5 MHz on differential inputs (IN1/IN2, IN5/IN6). However, loss-of-signal (LOS) detection is only functional above 5 MHz; below that threshold, LOS status is not asserted even if the input fails.

How does the SI5338C-B11301-GMR handle thermal management in high-density PCB layouts?

The SI5338C-B11301-GMR uses a 4 mm × 4 mm QFN package with an exposed thermal pad designed for direct connection to a PCB ground plane. Its thermal resistance is θJA = 37 °C/W (still air) and θJC = 10 °C/W, enabling efficient heat dissipation. For sustained 45 mA core current operation, a minimum 200 mm² copper pour under the thermal pad is recommended to maintain junction temperature below 125 °C at +85 °C ambient.