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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338D-B04193-GMR

Name: SI5338D-B04193-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338D-B04193-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338D-B04193-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338D-B04193-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338D-B04193-GMR from Skyworks Solutions is a quad-output, I²C-programmable clock generator using MultiSynth™ technology to synthesize independent frequencies up to 710 MHz on four differential outputs with 0 ppm precision, 0.7 ps RMS typical phase jitter, and PCIe Gen 1–4 compliance - deployed in Ethernet switches, FPGA clocking, and broadcast video timing systems.

For engineers reviewing the SI5338D-B04193-GMR datasheet, SI5338D-B04193-GMR pinout, SI5338D-B04193-GMR application, or SI5338D-B04193-GMR equivalent, key selection criteria include differential output format support (LVPECL/LVDS/HCSL), independent per-output voltage control (1.5–3.3 V), spread-spectrum capability (0.5–5.0% at 33–63 kHz), and 24-QFN package compatibility with PCIe Gen 4 SRNS requirements.

Technical Context

The SI5338D-B04193-GMR integrates two synthesis stages: a PLL-based Stage 1 (with 1.6 MHz loop bandwidth) and four independent MultiSynth™ fractional-N dividers in Stage 2, enabling any-frequency synthesis from a single reference input. It supports external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) references.

Each of its four output drivers is fully configurable for signal format (LVPECL, LVDS, HCSL, CMOS, SSTL, HSTL), output voltage (1.5/1.8/2.5/3.3 V), and features independent phase adjustment (<20 ps steps), frequency increment/decrement (1 ppm steps), and spread-spectrum modulation - all controlled via I²C/SMBus interface with OTP NVM storage.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count & type	Four differential outputs (CLK0A/B through CLK3A/B); supports up to eight single-ended clocks via configuration
Frequency range	0.16–710 MHz per output; integer/fractional synthesis with 1 ppb resolution
Phase jitter (RMS)	0.7 ps typical (12 kHz–20 MHz), meeting PCIe Gen 4 common clock and SRNS specs
Supply voltages	Core: 1.8/2.5/3.3 V ±10%; output buffers: independently configurable 1.5–3.63 V
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch, exposed thermal pad
Operating temp	–40 °C to +85 °C ambient, suitable for industrial and telecom line card environments
Interface	I²C/SMBus-compatible serial interface with interrupt (INTR) and programmable status alarms

Pinout & Package

SI5338D-B04193-GMR is housed in a 24-lead, 4 × 4 mm QFN package with exposed thermal pad (pin 24). Pin assignments are fixed per Skyworks Rev. 1.6 datasheet: inputs (IN1–IN6), outputs (CLK0A/B–CLK3A/B), power (VDD, VDDO0–VDDO3), control (SCL, SDA, INTR), and reserved ground (RSVD_GND).

Pin/Terminal	Circuit Role	Design Meaning
IN1/IN2, IN5/IN6	Differential reference inputs	Accept 5–710 MHz AC-coupled differential clocks; require external 100 Ω termination
IN3/IN4	Single-ended reference inputs	Support CMOS/SSTL/HSTL signals (5–350 MHz); internal 20 kΩ pull-up/pull-down selectable
CLK0A/CLK0B – CLK3A/CLK3B	Differential clock outputs	Four independent pairs; each configurable for LVPECL/LVDS/HCSL/CML with per-driver VDDO supply
VDDO0–VDDO3	Output buffer supplies	Independent 1.5–3.63 V rails per output pair enable mixed-voltage system interfacing
SCL/SDA/INTR	I²C interface & status	Standard SMBus-compliant control bus; INTR asserts on loss-of-lock or loss-of-signal events

Key Features

Feature	Design Value
MultiSynth™ synthesis	Enables true zero-ppm accuracy across all four outputs without external crystals or VCXOs
PCIe Gen 4 SRNS compliance	Meets <0.32 ps RMS jitter requirement under separate reference no-spread conditions (2–5 MHz PLL BW)
Independent phase tuning	Adjusts output phase in <20 ps steps per driver - critical for skew-sensitive SerDes alignment
Configurable spread spectrum	Programmable 0.5–5.0% down-spread at 33–63 kHz on any output to reduce EMI in dense PCB layouts
External feedback mode	Supports zero-delay operation by routing an output back to feedback input for deterministic latency
Loss-of-signal detection	Triggers alarm within 2.6–5 µs on input failure - enables fast failover in redundant clock architectures

Applications

PCIe Gen 4 Switch Fabric	Ethernet 10GbE Line Card
Use Scenario: High-speed switch ASIC requiring synchronized, low-jitter reference clocks for multiple SerDes lanes with strict Gen 4 SRNS compliance. IC Role / Device Role / Timing Role: Primary clock generator providing four independent 100 MHz HCSL clocks with <0.32 ps RMS jitter and programmable phase alignment. Use Value: Eliminates need for four discrete oscillators while meeting Intel's PCIe Gen 4 jitter mask without external filtering.	Use Scenario: 10GbE PHY interface on telecom line card needing precise 156.25 MHz and 312.5 MHz clocks with spread-spectrum EMI reduction. IC Role / Device Role / Timing Role: Dual-frequency synthesizer delivering one LVDS and one CML output with independent SSC modulation. Use Value: Reduces radiated emissions by >10 dB at fundamental harmonics while maintaining sub-1 ps RMS jitter.
Broadcast Video Timing	FPGA-Based Video Processing
Use Scenario: SMPTE ST 2082-1 (12G-SDI) equipment requiring ultra-low-jitter 27 MHz and 74.25 MHz clocks with tight phase coherence. IC Role / Device Role / Timing Role: Multi-format clock source generating LVPECL and LVDS outputs from a single 25 MHz crystal reference. Use Value: Achieves <10 ps pk-pk period jitter and <20 ps inter-output skew - essential for pixel-accurate video sampling.	Use Scenario: Adaptive compute platform using Xilinx Versal FPGA with heterogeneous clock domains (PL, PS, AI Engine). IC Role / Device Role / Timing Role: Configurable clock hub supplying 100 MHz (PS), 300 MHz (PL), and 500 MHz (AI Engine) from one device. Use Value: Enables dynamic reconfiguration of output frequencies and formats via I²C during runtime without FPGA bitstream reload.

PCIe Gen 4 Switch Fabric

Ethernet 10GbE Line Card

Use Scenario: High-speed switch ASIC requiring synchronized, low-jitter reference clocks for multiple SerDes lanes with strict Gen 4 SRNS compliance.

IC Role / Device Role / Timing Role: Primary clock generator providing four independent 100 MHz HCSL clocks with <0.32 ps RMS jitter and programmable phase alignment.

Use Value: Eliminates need for four discrete oscillators while meeting Intel's PCIe Gen 4 jitter mask without external filtering.

Use Scenario: 10GbE PHY interface on telecom line card needing precise 156.25 MHz and 312.5 MHz clocks with spread-spectrum EMI reduction.

IC Role / Device Role / Timing Role: Dual-frequency synthesizer delivering one LVDS and one CML output with independent SSC modulation.

Use Value: Reduces radiated emissions by >10 dB at fundamental harmonics while maintaining sub-1 ps RMS jitter.

Broadcast Video Timing

FPGA-Based Video Processing

Use Scenario: SMPTE ST 2082-1 (12G-SDI) equipment requiring ultra-low-jitter 27 MHz and 74.25 MHz clocks with tight phase coherence.

IC Role / Device Role / Timing Role: Multi-format clock source generating LVPECL and LVDS outputs from a single 25 MHz crystal reference.

Use Value: Achieves <10 ps pk-pk period jitter and <20 ps inter-output skew - essential for pixel-accurate video sampling.

Use Scenario: Adaptive compute platform using Xilinx Versal FPGA with heterogeneous clock domains (PL, PS, AI Engine).

IC Role / Device Role / Timing Role: Configurable clock hub supplying 100 MHz (PS), 300 MHz (PL), and 500 MHz (AI Engine) from one device.

Use Value: Enables dynamic reconfiguration of output frequencies and formats via I²C during runtime without FPGA bitstream reload.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5338A-B-GM	Same architecture and pinout; factory-programmed with fixed configuration (no field I²C reprogramming)	Limited to pre-defined frequency sets; unsuitable for designs requiring runtime frequency agility	Select SI5338D-B04193-GMR when field-upgradable clock trees or multi-project reuse of same hardware is required.
LMK04832ISQE/NOPB	Two-stage jitter cleaner + generator; higher integration (integrated LDOs, dual PLLs); larger 48-QFN package	Better suited for ultra-low-noise RF or data converter clocking where additive jitter <0.1 ps RMS is mandatory	Choose SI5338D-B04193-GMR for cost-sensitive, space-constrained PCIe/FPGA applications where 0.7 ps RMS meets spec.

Compared with Si5338A-B-GM, SI5338D-B04193-GMR offers full I²C configurability and field reprogrammability; versus LMK04832ISQE/NOPB, it trades jitter cleaning depth and power integration for smaller footprint and lower BOM cost in mid-performance timing applications.

Availability

SI5338D-B04193-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch fabrics, 10GbE line cards, and broadcast video timing systems requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for SI5338D-B04193-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and wireless infrastructure components.

The Si5338 family was designed specifically for high-density, multi-protocol timing consolidation in networking, computing, and broadcast equipment - replacing multiple discrete oscillators with a single programmable, low-jitter clock generator.

FAQ

What is the maximum output frequency supported by SI5338D-B04193-GMR?

The SI5338D-B04193-GMR supports up to 710 MHz on LVPECL/LVDS/CML outputs and 350 MHz on SSTL/HSTL outputs. For frequencies above 350 MHz, only two unique outputs may operate simultaneously - specifically Fvco/4 and Fvco/6 - as defined in the synthesis architecture. All outputs maintain 0.7 ps RMS typical jitter at these rates when driven differentially with proper layout.

Does SI5338D-B04193-GMR support PCIe Gen 4 Separate Reference No Spread (SRNS) compliance?

Yes, SI5338D-B04193-GMR meets PCIe Gen 4 SRNS requirements with <0.32 ps RMS jitter (typical) under specified test conditions: PLL bandwidth set to 2–5 MHz, CDR = 10 MHz, and HCSL 100 MHz outputs. This compliance is verified per PCI-SIG Base Specification 4.0 rev. 0.5 and confirmed using the Skyworks PCIe Clock Jitter Tool.

Can SI5338D-B04193-GMR generate different output voltages on each driver?

Yes, SI5338D-B04193-GMR provides independent VDDO0–VDDO3 supplies, allowing each of its four output pairs to be configured for 1.5 V, 1.8 V, 2.5 V, or 3.3 V logic levels. This enables direct interfacing with mixed-voltage SoCs, FPGAs, and PHYs without level-shifting components - a key advantage over fixed-supply clock generators.

How is SI5338D-B04193-GMR programmed, and is external nonvolatile memory required?

SI5338D-B04193-GMR is programmed via its integrated I²C/SMBus interface using ClockBuilder Pro software. Configuration is stored in on-chip one-time-programmable (OTP) memory, eliminating the need for external EEPROM or flash. Factory programming or field updates are both supported, and the device boots with valid clocks within 2 ms of power-on.

What reference inputs does SI5338D-B04193-GMR accept?

SI5338D-B04193-GMR accepts six reference inputs: two differential pairs (IN1/IN2, IN5/IN6) for 5–710 MHz; two single-ended pins (IN3, IN4) supporting CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz); and an internal oscillator for 8–30 MHz crystals. Input flexibility allows seamless integration into legacy and next-gen timing architectures.

SI5338D-B04193-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338D-B04193-GMR FAQ

1.How can I place an order for SI5338D-B04193-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338D-B04193-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338D-B04193-GMR reliable?

The price and inventory of SI5338D-B04193-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338D-B04193-GMR is usually 5 days.

3.What payment methods are accepted for SI5338D-B04193-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338D-B04193-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338D-B04193-GMR?

SI5338D-B04193-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338D-B04193-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338D-B04193-GMR?

For technical support, including SI5338D-B04193-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338D-B04193-GMR requirements.

6.How does Aetrix verify that SI5338D-B04193-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338D-B04193-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338D-B04193-GMR meets industry standards.

7.What is the process for return or replacement of SI5338D-B04193-GMR?

All SI5338D-B04193-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338D-B04193-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338D-B04193-GMR part is unused and in its original packaging.

Return procedure for SI5338D-B04193-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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