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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338D-B-GMR

Name: SI5338D-B-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338D-B-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338D-B-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338D-B-GMR.pdf

Description:: IC CLK GENERATOR I2C PROGR 24QFN

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Product details

Overview

SI5338D-B-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338D-B-GMR datasheet, SI5338D-B-GMR pinout, SI5338D-B-GMR application, or SI5338D-B-GMR equivalent, key selection criteria include its MultiSynth™-based any-frequency synthesis (0.16–710 MHz per output), independent output voltage support (1.5/1.8/2.5/3.3 V), low-power core supply (45 mA typ at 100 MHz), and I²C/SMBus programmability with ClockBuilder Pro software integration.

Technical Context

The SI5338D-B-GMR implements a two-stage PLL architecture: a high-stability reference stage (with external crystal or CMOS/SSTL/differential inputs) feeding a fractional-N MultiSynth™ synthesis stage per output. Each of the four outputs features independent frequency, format, voltage, phase offset (<20 ps steps), and spread-spectrum control.

It supports flexible input references - 8–30 MHz crystal, 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL, or 5–710 MHz differential - and delivers output frequencies from 0.16 MHz up to 710 MHz across LVPECL, LVDS, HCSL, CML, CMOS, SSTL, and HSTL formats, with true zero-ppm accuracy enabled by patented MultiSynth™ technology.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3/4 and GbE jitter requirements
Output Count & Flexibility	4 independent outputs; supports up to 4 differential, 8 single-ended, or mixed configurations
Frequency Range	0.16–710 MHz per output; includes PCIe Gen 4 (100 MHz HCSL), 156.25 MHz Ethernet, and 125 MHz GbE
Supply Voltages	Core: 1.8/2.5/3.3 V; Output buffers: independently configurable 1.5/1.8/2.5/3.3 V per driver
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch; RoHS-compliant, halogen-free
Operating Temp	–40 to +85 °C ambient; qualified for industrial and telecom line card environments
I²C Interface	Standard-mode (100 kHz) and fast-mode (400 kHz) compatible; supports ClockBuilder Pro configuration

Pinout & Package

SI5338D-B-GMR is housed in a 24-lead, 4 × 4 mm QFN package with exposed thermal pad. Pin assignments are fixed per the Si5338 family: 6 input pins (IN1–IN6), 8 clock output pins (CLK0A/B through CLK3A/B), 4 VDDOx power pins, 2 core supply pins (VDD), SCL/SDA/I²C interface, INTR alarm output, and RSVD_GND.

Pin/Terminal	Circuit Role	Design Meaning
CLK0A / CLK0B	Differential clock output pair 0	LVPECL/LVDS/HCSL/CML configurable; supports up to 710 MHz (LVPECL) or 250 MHz (HCSL)
CLK1A / CLK1B	Differential clock output pair 1	Independent frequency/format/voltage; enables multi-domain clocking (e.g., PCIe + Ethernet)
CLK2A / CLK2B	Differential clock output pair 2	Supports SSC modulation (0.5–5.0% spread, 33–63 kHz rate) for EMI reduction
CLK3A / CLK3B	Differential clock output pair 3	Includes independent phase adjustment (<20 ps resolution) and glitchless frequency step (1 ppm)
IN1 / IN2, IN5 / IN6	Differential reference inputs	Accept 5–710 MHz AC-coupled signals; require external 100 Ω termination
IN3 / IN4	Single-ended reference inputs	Support CMOS/SSTL/HSTL (5–350 MHz); 0.7×VDD VIH threshold ensures noise margin
VDDO0–VDDO3	Output buffer supply rails	Each powers one output pair; allows mixed-voltage operation (e.g., 1.8 V for FPGA, 3.3 V for legacy logic)
VDD	Core supply	Single 1.8/2.5/3.3 V rail; PSRR optimized for clean internal PLL operation
SCL / SDA	I²C serial interface	Configures all registers, NVM, and runtime parameters; supports SMBus alert response
INTR	Interrupt output	Open-drain status flag for loss-of-lock (LOL) and loss-of-signal (LOS) events

Key Features

Feature	Design Value
MultiSynth™ Any-Frequency Synthesis	Generates four independent, zero-ppm-accurate clocks from a single reference - eliminates need for multiple XO/VCXOs
PCIe Gen 1–4 & SRNS Compliance	Validated for Common Clock and Separate Reference No Spread modes; meets Gen 3/4 RMS jitter limits (≤0.45 ps)
Independent Output Voltage per Driver	Enables direct interfacing with mixed-voltage systems (e.g., 1.8 V FPGA core + 3.3 V PHY) without level shifters
Glitchless Frequency Adjustment	1 ppm incremental/decremental tuning via pin or I²C - maintains continuous clock output during dynamic reconfiguration
Programmable Spread Spectrum	Configurable on any output: 0.5–5.0% down-spread, 33–63 kHz modulation rate - reduces EMI peak emissions by >10 dB
External Feedback Mode	Supports zero-delay buffer operation - preserves input clock phase alignment for synchronous backplane timing

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch/Routing
Use Scenario: Providing synchronized 100 MHz HCSL clocks to multiple PCIe Gen 4 switch ASICs in a data center top-of-rack switch. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent, low-jitter (≤0.45 ps RMS) PCIe-compliant clocks with matched skew. Use Value: Eliminates four discrete oscillators and simplifies layout while meeting PCIe Gen 4 Common Clock jitter spec under temperature and voltage variation.	Use Scenario: Generating 125 MHz and 156.25 MHz clocks for 1/10 GbE PHYs and packet processors in carrier-grade Ethernet aggregation switches. IC Role / Device Role / Timing Role: Programmable frequency translator converting a 25 MHz crystal reference into multiple Ethernet-standard rates with <20 ps inter-output skew. Use Value: Enables single-reference design across 1G/10G ports, reducing BOM count and improving timing margin over temperature.
Broadcast Video Timing	FPGA Processor Clocking
Use Scenario: Delivering SMPTE ST 2082 (27 Gbps) and ST 2081 (12 Gbps) reference clocks to video encoder/decoder FPGAs in 4K/8K broadcast equipment. IC Role / Device Role / Timing Role: High-frequency clock synthesizer generating 270 MHz, 540 MHz, and 74.25 MHz outputs with sub-ps jitter for pixel-clock precision. Use Value: Meets SMPTE jitter requirements (<0.2 UI) for uncompressed video transport, avoiding frame sync errors or color artifacts.	Use Scenario: Supplying core, memory, and peripheral clocks (e.g., 300 MHz, 100 MHz, 50 MHz) to Xilinx Versal or Intel Agilex FPGAs in adaptive compute platforms. IC Role / Device Role / Timing Role: Configurable quad clock source supporting mixed-signal I/O banks with independent voltage and format per domain. Use Value: Reduces FPGA pin count and PCB layer count by consolidating clock distribution, while enabling dynamic reconfiguration via I²C during partial reconfiguration.

PCIe Gen 4 Switch Timing

Ethernet Switch/Routing

Use Scenario: Providing synchronized 100 MHz HCSL clocks to multiple PCIe Gen 4 switch ASICs in a data center top-of-rack switch.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent, low-jitter (≤0.45 ps RMS) PCIe-compliant clocks with matched skew.

Use Value: Eliminates four discrete oscillators and simplifies layout while meeting PCIe Gen 4 Common Clock jitter spec under temperature and voltage variation.

Use Scenario: Generating 125 MHz and 156.25 MHz clocks for 1/10 GbE PHYs and packet processors in carrier-grade Ethernet aggregation switches.

IC Role / Device Role / Timing Role: Programmable frequency translator converting a 25 MHz crystal reference into multiple Ethernet-standard rates with <20 ps inter-output skew.

Use Value: Enables single-reference design across 1G/10G ports, reducing BOM count and improving timing margin over temperature.

Broadcast Video Timing

FPGA Processor Clocking

Use Scenario: Delivering SMPTE ST 2082 (27 Gbps) and ST 2081 (12 Gbps) reference clocks to video encoder/decoder FPGAs in 4K/8K broadcast equipment.

IC Role / Device Role / Timing Role: High-frequency clock synthesizer generating 270 MHz, 540 MHz, and 74.25 MHz outputs with sub-ps jitter for pixel-clock precision.

Use Value: Meets SMPTE jitter requirements (<0.2 UI) for uncompressed video transport, avoiding frame sync errors or color artifacts.

Use Scenario: Supplying core, memory, and peripheral clocks (e.g., 300 MHz, 100 MHz, 50 MHz) to Xilinx Versal or Intel Agilex FPGAs in adaptive compute platforms.

IC Role / Device Role / Timing Role: Configurable quad clock source supporting mixed-signal I/O banks with independent voltage and format per domain.

Use Value: Reduces FPGA pin count and PCB layer count by consolidating clock distribution, while enabling dynamic reconfiguration via I²C during partial reconfiguration.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D-GM	Higher integration: 8 outputs, integrated LDOs, lower jitter (0.35 ps RMS), supports JESD204B deterministic latency	Targeted at high-channel-count SerDes (e.g., 5G radio, radar), not cost-sensitive PCIe/ethernet designs	Select when needing >4 outputs, tighter jitter, or deterministic delay - requires redesign due to different pinout and power architecture
ICS8430I-01T	Fixed-frequency, non-programmable; 4 LVDS outputs; 1.2 ps RMS jitter; no I²C interface or spread spectrum	Limited to static clock trees (e.g., legacy storage controllers); no dynamic reconfiguration or EMI tuning	Choose only for simple, low-cost, fixed-rate applications where programmability and jitter headroom are unnecessary

Compared with Si5332A-D-GM and ICS8430I-01T, the SI5338D-B-GMR uniquely balances field-programmability, PCIe/ethernet compliance, and cost-effective 4-output flexibility - making it optimal for industrial networking and mid-tier FPGA timing where reconfigurability matters but 8-output density is overkill.

Availability

SI5338D-B-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switching/routing, and FPGA processor clocking requiring stable component supply across industrial temperature ranges and long production lifecycles.

Supply support for SI5338D-B-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The SI5338D-B-GMR belongs to Skyworks' Si5338 family of programmable clock generators, designed specifically for high-speed serial interface timing in datacom, telecom, and broadcast video systems where low jitter, multi-format flexibility, and field configurability are critical.

FAQ

What is the maximum output frequency supported by the SI5338D-B-GMR in LVPECL format?

The SI5338D-B-GMR supports up to 710 MHz in LVPECL format per output, as specified in Table 6 of the datasheet. This capability enables direct clocking of high-speed SerDes lanes in PCIe Gen 4 and 25G Ethernet applications. Operation above 350 MHz is limited to two unique frequencies simultaneously (Fvco/4 and Fvco/6) due to VCO architecture constraints.

Does the SI5338D-B-GMR support spread-spectrum clocking (SSC) on all four outputs?

Yes, the SI5338D-B-GMR supports independent spread-spectrum clocking on any output, with programmable spread (0.5–5.0%), modulation rate (33–63 kHz), and direction (down-spread default). Each output's SSC engine is fully decoupled, allowing simultaneous but distinct SSC profiles - essential for multi-domain EMI suppression in dense PCB layouts.

Can the SI5338D-B-GMR operate with a 25 MHz crystal input?

No - the SI5338D-B-GMR's on-chip crystal oscillator supports only 8–30 MHz crystals. A 25 MHz crystal falls within this range and is fully supported. The device automatically configures load capacitance (17–19 pF recommended) and drive level (≤100 µW) to ensure reliable startup and stability across temperature and voltage.

How does the SI5338D-B-GMR handle loss-of-signal (LOS) detection?

The SI5338D-B-GMR provides dedicated LOS detection on all six input pins (IN1–IN6), with configurable thresholds and response times (2.6–5 µs detect, 0.01–1 µs release). Detection status is reported via the open-drain INTR pin and readable through I²C register 0x000C, enabling system-level fault monitoring without external circuitry.

Is ClockBuilder Pro software required to configure the SI5338D-B-GMR?

No - ClockBuilder Pro is optional but strongly recommended. The SI5338D-B-GMR can be configured via raw I²C writes to its 256-byte register map; however, ClockBuilder Pro automates MultiSynth™ divider calculations, validates frequency plans, generates .c files for production programming, and performs jitter simulation - significantly reducing bring-up time and configuration risk for the SI5338D-B-GMR.

SI5338D-B-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: Yes

Main Purpose:: Ethernet, Fibre Channel, PCI Express (PCIe), Telecom

Input:: CML, CMOS, HCSL, HSCL, HSTL, LVDS, LVPECL, SSTL, Crystal

Output:: HCSL, HSTL, LVCMOS, LVDS, LVPECL, SSTL

Number of Circuits:: 1

Ratio - Input:Output:: 2:4

Differential - Input:Output:: Yes/Yes

Frequency - Max:: 710MHz

Voltage - Supply:: 1.71V ~ 3.63V

Operating Temperature:: -40°C ~ 85°C

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338D-B-GMR FAQ

1.How can I place an order for SI5338D-B-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338D-B-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338D-B-GMR reliable?

The price and inventory of SI5338D-B-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338D-B-GMR is usually 5 days.

3.What payment methods are accepted for SI5338D-B-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338D-B-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338D-B-GMR?

SI5338D-B-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338D-B-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338D-B-GMR?

For technical support, including SI5338D-B-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338D-B-GMR requirements.

6.How does Aetrix verify that SI5338D-B-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338D-B-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338D-B-GMR meets industry standards.

7.What is the process for return or replacement of SI5338D-B-GMR?

All SI5338D-B-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338D-B-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338D-B-GMR part is unused and in its original packaging.

Return procedure for SI5338D-B-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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