Skyworks Solutions Inc. SI5338F-B04073-GM
- Part No.:
- SI5338F-B04073-GM
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Application Specific Clock/Timing
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
SI5338F-B04073-GM.pdf
- Description:
- I2C CONTROL, 4-OUTPUT, ANY FREQU
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI5338F-B04073-GM from Skyworks Solutions is an I²C-programmable quad clock generator with four independent differential output drivers, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL output formats across 0.16–710 MHz. It replaces up to four crystal oscillators in high-speed serial interface timing applications such as PCIe root complexes and Ethernet switch fabric.
For engineers reviewing the SI5338F-B04073-GM datasheet, SI5338F-B04073-GM pinout, SI5338F-B04073-GM application, or SI5338F-B04073-GM equivalent, key selection criteria include its MultiSynth™-based any-frequency synthesis capability, independent per-output voltage (1.5/1.8/2.5/3.3 V), 24-pin 4×4 mm QFN package, and I²C/SMBus programmability with ClockBuilder Pro software integration.
Technical Context
The SI5338F-B04073-GM implements a two-stage PLL architecture: a high-stability integer-N PLL (Stage 1) locks to one of six input references (crystal, CMOS, SSTL/HSTL, or differential), followed by four independent MultiSynth™ fractional-N synthesis blocks (Stage 2) generating outputs with true zero-ppm accuracy. Each output supports configurable format, voltage, spread spectrum, phase offset (±45 ns), and frequency increment/decrement (1 ppm steps).
It operates from a single 1.8/2.5/3.3 V core supply with 45 mA typical current draw, integrates OTP NVM for factory configuration, and provides loss-of-lock and loss-of-signal alarms via the INTR pin. The device supports external feedback for zero-delay mode and features <20 ps phase step resolution with sub-nanosecond update timing via pin control.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Phase Jitter (RMS) | 0.7 ps - meets PCIe Gen 4 common clock and 10 GbE jitter requirements at 100 MHz HCSL output |
| Output Frequency Range | 0.16–710 MHz - covers PCIe 100/125 MHz, Ethernet 125/156.25 MHz, Fibre Channel 212.5/266.7 MHz, and processor clocks up to 710 MHz |
| Input Reference Support | 8–30 MHz crystal, 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL, 5–710 MHz differential - enables flexible system-level clock tree design |
| Output Driver Flexibility | Up to 4 differential (LVPECL/LVDS/HCSL/CML) or 8 single-ended (CMOS/SSTL/HSTL) outputs - allows mixed-signal timing distribution without external buffers |
| Supply Voltage | Core: 1.8/2.5/3.3 V ±10%; Output buffers: 1.4–3.63 V independently per driver - supports multi-voltage SoC/FPGA interfaces |
| Package | 24-pin QFN, 4 × 4 mm, 0.5 mm pitch - compatible with standard PCB assembly processes and space-constrained telecom line cards |
| Operating Temperature | –40 °C to +85 °C - qualified for industrial and networking equipment deployment |
Pinout & Package
SI5338F-B04073-GM uses a 24-pin QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin 1 is top-left corner (IN1), pins numbered counter-clockwise. Ground and power pins are distributed for low-noise operation; all outputs are differential pairs (CLKxA/CLKxB). SCL/SDA/I²C interface and INTR alarm pin support system-level monitoring and dynamic reconfiguration.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN1, IN2, IN5, IN6 | Differential input pair | Accepts 5–710 MHz AC-coupled differential reference clocks; internal 100 Ω termination enabled |
| IN3, IN4 | Single-ended input | Supports 5–200 MHz CMOS clock; VIH = 0.7×VDD, VIL = 0.3×VDD; 20 kΩ pull-up/pull-down configurable |
| CLK0A–CLK3B | Differential output pairs | Four independent outputs; each pair supports LVPECL/LVDS/HCSL/CML; VDDOx sets output voltage per driver |
| VDDO0–VDDO3 | Output buffer supply | Independent 1.4–3.63 V supplies per output bank - enables mixed-voltage clock distribution |
| VDD | Core supply | 1.8/2.5/3.3 V ±10% core rail; PSRR optimized for clean internal PLL operation |
| SCL, SDA | I²C/SMBus interface | Standard 100 kHz/400 kHz operation; supports ClockBuilder Pro programming and runtime frequency adjustment |
| INTR | Interrupt output | Open-drain status indicator for loss-of-lock and loss-of-signal events; active-low, 3 mA sink capability |
Key Features
| Feature | Design Value |
|---|---|
| MultiSynth™ synthesis | Enables independent, any-frequency generation on all four outputs with 1 ppb resolution and zero ppm error - eliminates need for multiple crystals |
| PCIe Gen 1–4 compliance | Meets total jitter (33.6 ps pk-pk Gen 2), RMS jitter (0.15 ps Gen 3/4), and SRNS requirements - validated using Intel Clock Jitter Tool |
| Independent output voltage per driver | Each of four output banks supports 1.5/1.8/2.5/3.3 V - matches diverse FPGA I/O banks, ASIC clock inputs, and SerDes reference voltages |
| Glitchless frequency tuning | 1 ppm step size with 667 ns update time via pin control - enables real-time clock rate adaptation in adaptive systems without output interruption |
| Programmable phase offset | ±45 ns range in <20 ps steps - allows precise skew compensation between parallel data paths (e.g., DDR memory channels or multi-lane SerDes) |
| Spread spectrum support | Configurable 0.5–5.0% down-spread at 33–63 kHz on any output - reduces EMI peak emissions in dense PCB layouts |
Applications
| PCIe Gen 4 Root Complex | Ethernet Switch Fabric |
|---|---|
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 endpoints and upstream ports in a 1U server backplane. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent, low-jitter 100 MHz HCSL clocks with matched phase alignment. Use Value: Eliminates four discrete oscillators; achieves 0.15 ps RMS jitter required for PCIe Gen 4 common clock compliance per SKYWORKS AN562 validation. |
Use Scenario: Generating 125 MHz and 156.25 MHz clocks for 10 GbE PHYs and packet processing ASICs in a modular L2/L3 switch. IC Role / Device Role / Timing Role: Any-frequency synthesizer producing exact IEEE 802.3-compliant frequencies from a single 25 MHz crystal reference. Use Value: Reduces BOM count and layout area; supports both SFP+ and QSFP28 modules with independent voltage scaling (1.8 V for PHYs, 2.5 V for ASICs). |
| Broadcast Video Timing | FPGA-Based Test Equipment |
Use Scenario: Delivering SMPTE ST 2082 (27 Gbps) reference clocks and genlock signals across multiple video processing boards in a broadcast router. IC Role / Device Role / Timing Role: High-precision clock translator converting 27 MHz studio master reference into 74.25 MHz, 148.5 MHz, and 297 MHz pixel clocks. Use Value: Achieves <10 ps cycle-cycle jitter critical for 4K/8K video sampling; supports frame-accurate synchronization via programmable phase offset. |
Use Scenario: Providing configurable clock sources for high-speed digital pattern generators and logic analyzers with user-selectable sample rates. IC Role / Device Role / Timing Role: Reconfigurable clock generator enabling on-the-fly switching between 100 MHz, 200 MHz, and 400 MHz test clocks without hardware change. Use Value: Enables single-hardware platform to validate multiple DUT interfaces (PCIe, DDR4, MIPI); 1 ppm frequency step supports margin testing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad-output clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5332A-D06189-GM | Higher integration: 8 outputs, integrated jitter cleaner, lower 0.35 ps RMS jitter; requires external 100 MHz reference for optimal performance | Targeted at ultra-low-jitter applications (e.g., 5G fronthaul, coherent optics) where jitter budget is tighter than PCIe Gen 4 | Select Si5332A-D06189-GM when sub-0.4 ps RMS jitter and >4 outputs are required; not drop-in due to different pinout and register map |
| ICS8430I-01T | Fixed-frequency, non-programmable; 4 LVDS outputs only; 1.2 ps RMS jitter; no I²C interface or spread spectrum | Suitable for cost-sensitive, static clock trees where frequency flexibility is unnecessary (e.g., legacy storage controllers) | Choose ICS8430I-01T for fixed 100/125 MHz distribution with minimal firmware overhead; lacks SI5338F-B04073-GM's configurability and PCIe Gen 4 compliance |
Compared with Si5332A-D06189-GM and ICS8430I-01T, the SI5338F-B04073-GM uniquely balances programmability, PCIe Gen 4 compliance, and compact 24-QFN packaging - making it optimal for field-upgradable networking and compute platforms requiring four precisely controlled, independently configured clocks.
Availability
SI5338F-B04073-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 root complexes, 10 GbE switch fabric, and broadcast video timing applications requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for SI5338F-B04073-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.
The SI5338F-B04073-GM belongs to Skyworks' Si5338 family of programmable clock generators, designed specifically for high-speed serial interface timing in networking, computing, and broadcast equipment where flexibility, low jitter, and small footprint are critical.
FAQ
What is the primary function of the SI5338F-B04073-GM in a PCIe Gen 4 system?
The SI5338F-B04073-GM serves as a quad-output clock generator providing four independent, low-jitter 100 MHz HCSL reference clocks compliant with PCIe Gen 4 Common Clock specifications. Its 0.15 ps RMS jitter (10 kHz–50 MHz) and 33.6 ps pk-pk total jitter meet Intel's PCIe Base Specification 4.0 requirements, enabling reliable link training and stable operation across multiple endpoints without requiring separate oscillators.
Does the SI5338F-B04073-GM support spread spectrum clocking (SSC)?
Yes, the SI5338F-B04073-GM supports highly configurable spread spectrum clocking on any output: modulation rates from 33 to 63 kHz, spread percentages from 0.5% to 5.0%, and selectable up/down or center-spread modes. This feature is implemented in hardware and can be enabled/disabled per output via I²C register writes, reducing electromagnetic interference in dense PCB environments without affecting timing accuracy.
Can the SI5338F-B04073-GM generate different output voltages simultaneously?
Yes, the SI5338F-B04073-GM supports independent output supply voltages per driver bank: VDDO0 through VDDO3 each accept 1.4–3.63 V. This allows simultaneous generation of 1.8 V LVDS clocks for an FPGA transceiver bank and 2.5 V SSTL clocks for a memory controller on the same device - eliminating level-shifting components and simplifying power delivery.
How is the SI5338F-B04073-GM programmed and configured?
The SI5338F-B04073-GM is programmed via its I²C/SMBus-compatible interface using Skyworks' ClockBuilder Pro software. This GUI tool enables full configuration of input references, output frequencies, formats, voltages, spread spectrum, phase offsets, and alarm thresholds. Configuration can be stored in on-chip OTP memory for autonomous startup, or loaded dynamically during system operation.
What is the thermal performance of the SI5338F-B04073-GM under full load?
Under full load (100 MHz on all outputs, 25 MHz reference), the SI5338F-B04073-GM draws 45 mA typical core current. With a junction-to-ambient thermal resistance (θJA) of 37 °C/W in still air, and maximum ambient temperature of +85 °C, the junction temperature remains within safe limits (<125 °C) without forced airflow - verified per JEDEC JESD51-2 standards and supported by the exposed thermal pad in the 24-QFN package.
SI5338F-B04073-GM Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- MultiSynth™
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- PLL:
- -
- Main Purpose:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 24-QFN (4x4)
SI5338F-B04073-GM FAQ
1.How can I place an order for SI5338F-B04073-GM through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5338F-B04073-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5338F-B04073-GM reliable?
The price and inventory of SI5338F-B04073-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338F-B04073-GM is usually 5 days.
3.What payment methods are accepted for SI5338F-B04073-GM?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338F-B04073-GM transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5338F-B04073-GM?
SI5338F-B04073-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5338F-B04073-GM order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5338F-B04073-GM?
For technical support, including SI5338F-B04073-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338F-B04073-GM requirements.
6.How does Aetrix verify that SI5338F-B04073-GM is sourced from the original manufacturer or authorized distributors?
All SI5338F-B04073-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338F-B04073-GM meets industry standards.
7.What is the process for return or replacement of SI5338F-B04073-GM?
All SI5338F-B04073-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338F-B04073-GM, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5338F-B04073-GM part is unused and in its original packaging.
Return procedure for SI5338F-B04073-GM:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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