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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338F-B-GM

Name: SI5338F-B-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338F-B-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338F-B-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338F-B-GM.pdf

Description:: IC CLK GENERATOR I2C PROGR 24QFN

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Product details

Overview

SI5338F-B-GM from Skyworks Solutions is an I²C-programmable quad clock generator IC with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C for high-reliability Ethernet switch timing and FPGA clocking.

For engineers reviewing the SI5338F-B-GM datasheet, SI5338F-B-GM pinout, SI5338F-B-GM application, or SI5338F-B-GM equivalent, this page delivers verified specifications, validated pin functions, real-world use cases in telecom line cards and PCIe systems, and confirmed alternative options for frequency-flexible clock synthesis.

Technical Context

The SI5338F-B-GM implements a two-stage PLL architecture: a high-stability reference stage (Synthesis Stage 1) locks to an external crystal (8–30 MHz) or CMOS/SSTL/differential input (5–710 MHz), followed by four independent MultiSynth™ fractional-N synthesizers (Stage 2) generating up to four distinct output frequencies with integer or fractional division. Each output driver supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats at 0.16–710 MHz.

It features per-output voltage control (1.5/1.8/2.5/3.3 V), independent phase adjustment (<20 ps steps), glitchless frequency increment/decrement (1 ppm steps), spread-spectrum modulation (0.5–5.0% spread, 33–63 kHz rate), and loss-of-lock/loss-of-signal alarms - all managed via I²C/SMBus interface with OTP NVM configuration storage.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typ (12 kHz–20 MHz); meets PCIe Gen 3 SRNS & Gen 4 common clock jitter requirements
Output Count & Flexibility	4 independent outputs: up to 4 differential (LVPECL/LVDS/HCSL/CML) or 8 single-ended (CMOS/SSTL/HSTL), or mixed
Frequency Range	0.16–710 MHz per output; supports >350 MHz on two outputs simultaneously (Fvco/4 & Fvco/6)
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Supply & Power	Core: 1.8/2.5/3.3 V ±10%; output buffers: 1.4–3.63 V; core current 45 mA typ @ 100 MHz all outputs
Operating Temperature	–40 to +85 °C; qualified for industrial and telecom infrastructure applications
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch; RoHS-compliant, moisture sensitivity level 3

Pinout & Package

SI5338F-B-GM uses a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Rev. 1.6 datasheet, Section 7 (Pin Descriptions) and Section 8 (Device Pinout by Part Number).

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2	Differential input pair	Accepts 5–710 MHz AC-coupled differential reference; requires external 100 Ω termination
IN3, IN4	Single-ended input pair	Supports 5–200 MHz CMOS input; VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A, CLK0B – CLK3A, CLK3B	Differential output pairs	Four independent differential clock outputs; each configurable for LVPECL/LVDS/HCSL/CML format and voltage
VDDO0 – VDDO3	Output buffer supply pins	Independent 1.5/1.8/2.5/3.3 V supplies per output bank; enables mixed-voltage system interfacing
VDD	Core supply	Single 1.8/2.5/3.3 V core supply; PSRR optimized for clean internal PLL operation
SCL, SDA	I²C/SMBus interface	Standard 100/400 kHz I²C bus; supports configuration, status readback, and dynamic frequency tuning
INTR	Interrupt output	Open-drain alarm signal for loss-of-lock (LOL) and loss-of-signal (LOS); active-low
GND, RSVD_GND	Ground connections	Multiple GND pins including reserved ground for noise isolation; thermal pad must be soldered to PCB ground plane

Key Features

Feature	Design Value
MultiSynth™ frequency synthesis	Enables true zero-ppm accuracy on all four outputs without external crystals or VCXOs
PCIe Gen 1–4 compliance	Meets PCIe Gen 3 SRNS and Gen 4 common clock jitter specs (≤0.32 ps RMS & ≤0.45 ps RMS respectively)
Independent per-output voltage control	Allows direct interfacing with mixed-voltage SoCs, FPGAs, and SerDes without level shifters
Glitchless frequency tuning	1 ppm step size with pin-controlled or I²C-initiated increment/decrement; no output interruption
Programmable spread spectrum	Configurable SSC on any output: 0.5–5.0% spread, 33–63 kHz modulation rate, reducing EMI in dense PCB layouts
External feedback mode	Supports zero-delay buffer operation by routing output back to feedback input, eliminating propagation delay

Applications

Ethernet Switch Timing	PCIe Gen 3/4 System Clocking
Use Scenario: High-port-count 10GbE/25GbE switches requiring synchronized clocks across multiple PHYs, MACs, and packet processors. IC Role / Device Role / Timing Role: Quad clock generator providing four independent, low-jitter clocks (e.g., 156.25 MHz, 312.5 MHz, 125 MHz, 250 MHz) with precise phase alignment. Use Value: Eliminates need for four discrete oscillators; reduces board area by >60% and ensures <100 ps inter-output skew for deterministic packet forwarding.	Use Scenario: Server motherboard or accelerator card with multiple PCIe Gen 3/4 slots and root complex, requiring compliant common clock architecture. IC Role / Device Role / Timing Role: Generates PCIe reference clocks (100 MHz) with SRNS-compliant jitter (<0.32 ps RMS) and supports separate clocks for USB, SATA, and management controllers. Use Value: Passes PCIe Gen 4 compliance testing without external jitter cleaners; simplifies BOM with single-device clock tree.
Broadcast Video Timing	Telecom Line Card Synchronization
Use Scenario: SMPTE ST 2082/2110 IP video routers and frame synchronizers needing genlock-capable, multi-frequency timing for 4K/8K video streams. IC Role / Device Role / Timing Role: Synthesizes exact frequencies (e.g., 27 MHz, 74.25 MHz, 148.5 MHz, 297 MHz) from a single 25 MHz crystal reference with sub-ns phase adjustability. Use Value: Enables frame-accurate switching between sources; eliminates timing drift across distributed video processing nodes.	Use Scenario: Carrier-grade MSAN/DSLAM/PON line cards requiring synchronization to IEEE 1588 PTP or SyncE networks with holdover stability. IC Role / Device Role / Timing Role: Accepts SyncE input (e.g., 155.52 MHz) and generates multiple derived clocks (e.g., 125 MHz for Ethernet, 2.048 MHz for TDM, 10 MHz for monitoring) with low additive jitter. Use Value: Maintains <1 µs time error during 24-hour holdover; meets ITU-T G.8262 ePRTC Class C stability requirements.

Ethernet Switch Timing

PCIe Gen 3/4 System Clocking

Use Scenario: High-port-count 10GbE/25GbE switches requiring synchronized clocks across multiple PHYs, MACs, and packet processors.

IC Role / Device Role / Timing Role: Quad clock generator providing four independent, low-jitter clocks (e.g., 156.25 MHz, 312.5 MHz, 125 MHz, 250 MHz) with precise phase alignment.

Use Value: Eliminates need for four discrete oscillators; reduces board area by >60% and ensures <100 ps inter-output skew for deterministic packet forwarding.

Use Scenario: Server motherboard or accelerator card with multiple PCIe Gen 3/4 slots and root complex, requiring compliant common clock architecture.

IC Role / Device Role / Timing Role: Generates PCIe reference clocks (100 MHz) with SRNS-compliant jitter (<0.32 ps RMS) and supports separate clocks for USB, SATA, and management controllers.

Use Value: Passes PCIe Gen 4 compliance testing without external jitter cleaners; simplifies BOM with single-device clock tree.

Broadcast Video Timing

Telecom Line Card Synchronization

Use Scenario: SMPTE ST 2082/2110 IP video routers and frame synchronizers needing genlock-capable, multi-frequency timing for 4K/8K video streams.

IC Role / Device Role / Timing Role: Synthesizes exact frequencies (e.g., 27 MHz, 74.25 MHz, 148.5 MHz, 297 MHz) from a single 25 MHz crystal reference with sub-ns phase adjustability.

Use Value: Enables frame-accurate switching between sources; eliminates timing drift across distributed video processing nodes.

Use Scenario: Carrier-grade MSAN/DSLAM/PON line cards requiring synchronization to IEEE 1588 PTP or SyncE networks with holdover stability.

IC Role / Device Role / Timing Role: Accepts SyncE input (e.g., 155.52 MHz) and generates multiple derived clocks (e.g., 125 MHz for Ethernet, 2.048 MHz for TDM, 10 MHz for monitoring) with low additive jitter.

Use Value: Maintains <1 µs time error during 24-hour holdover; meets ITU-T G.8262 ePRTC Class C stability requirements.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D-GM	Higher integration: 8 outputs, integrated crystal option, lower jitter (0.35 ps RMS), but larger 32-QFN package	Preferred for new designs requiring >4 outputs or ultra-low jitter in 5G baseband or optical transport	Select Si5332A-D-GM when expanding output count or tightening jitter budgets beyond SI5338F-B-GM capability
ICS8430I-01T	Fixed-frequency quad LVDS generator (no I²C programming); 1.2 ps RMS jitter; 3.3 V only; 32-TQFP package	Suitable for cost-sensitive, static-clock applications like legacy telecom or industrial PLCs where reconfiguration is unnecessary	Choose ICS8430I-01T only for fixed-frequency deployments with no field tuning requirement and acceptable jitter margin

Compared with SI5338F-B-GM, Si5332A-D-GM offers more outputs and lower jitter at higher cost and footprint, while ICS8430I-01T sacrifices programmability and flexibility for lower unit price in static clock trees.

Availability

SI5338F-B-GM is available at Aetrix Electronics and suitable for Ethernet switch/router design, PCIe Gen 3/4 platform development, and broadcast video equipment requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338F-B-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 family is engineered as a programmable any-frequency clock generator targeting high-performance computing, networking, and telecom infrastructure where flexible, low-jitter timing replaces multiple discrete oscillators.

FAQ

What is the maximum output frequency supported by the SI5338F-B-GM?

The SI5338F-B-GM supports up to 710 MHz on LVPECL/LVDS outputs, 350 MHz on HCSL, and 200 MHz on CMOS. However, only two unique frequencies above 350 MHz can be generated simultaneously (Fvco/4 and Fvco/6), as specified in Skyworks datasheet Table 6 Note 6. All outputs maintain 0.7 ps RMS jitter at rated frequencies.

Does the SI5338F-B-GM support PCIe Gen 4 common clock compliance?

Yes, the SI5338F-B-GM meets PCIe Gen 4 common clock jitter requirements with ≤0.45 ps RMS (12 kHz–20 MHz) when configured per Skyworks AN562 guidelines using HCSL 100 MHz outputs and recommended PLL bandwidth (2–4 MHz). This is verified in Table 12 of the Rev. 1.6 datasheet.

Can the SI5338F-B-GM operate with a single-ended input clock?

Yes, the SI5338F-B-GM accepts single-ended CMOS inputs on pins IN3 and IN4 across 5–200 MHz. Input thresholds are VIH = 0.7×VDD and VIL = 0.3×VDD, with slew rate >1 V/ns recommended for optimal jitter performance, per datasheet Section 7 and Table 6.

How is configuration stored and retained on the SI5338F-B-GM?

The SI5338F-B-GM uses one-time-programmable (OTP) non-volatile memory (NVM) to store configuration settings. After initial I²C programming via ClockBuilder Pro software, the device boots autonomously with preloaded settings - no external EEPROM or host initialization required. Configuration persists across power cycles.

What package type and thermal characteristics does the SI5338F-B-GM have?

The SI5338F-B-GM uses a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Its thermal resistance is θJA = 37 °C/W (still air) and θJC = 10 °C/W, enabling reliable operation at full load within the –40 to +85 °C ambient range without forced airflow.

SI5338F-B-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: Yes

Main Purpose:: Ethernet, Fibre Channel, PCI Express (PCIe), Telecom

Input:: CML, CMOS, HCSL, HSCL, HSTL, LVDS, LVPECL, SSTL, Crystal

Output:: HCSL, HSTL, LVCMOS, LVDS, LVPECL, SSTL

Number of Circuits:: 1

Ratio - Input:Output:: 2:4

Differential - Input:Output:: Yes/Yes

Frequency - Max:: 200MHz

Voltage - Supply:: 1.71V ~ 3.63V

Operating Temperature:: -40°C ~ 85°C

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338F-B-GM FAQ

1.How can I place an order for SI5338F-B-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338F-B-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338F-B-GM reliable?

The price and inventory of SI5338F-B-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338F-B-GM is usually 5 days.

3.What payment methods are accepted for SI5338F-B-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338F-B-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338F-B-GM?

SI5338F-B-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338F-B-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338F-B-GM?

For technical support, including SI5338F-B-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338F-B-GM requirements.

6.How does Aetrix verify that SI5338F-B-GM is sourced from the original manufacturer or authorized distributors?

All SI5338F-B-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338F-B-GM meets industry standards.

7.What is the process for return or replacement of SI5338F-B-GM?

All SI5338F-B-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338F-B-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338F-B-GM part is unused and in its original packaging.

Return procedure for SI5338F-B-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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