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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338F-B-GMR

Name: SI5338F-B-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338F-B-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338F-B-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338F-B-GMR.pdf

Description:: IC CLK GENERATOR I2C PROGR 24QFN

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Product details

Overview

SI5338F-B-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independent differential output drivers, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL output formats across 0.16–710 MHz. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338F-B-GMR datasheet, SI5338F-B-GMR pinout, SI5338F-B-GMR application, or SI5338F-B-GMR equivalent, this page delivers verified specifications, validated pin functions, confirmed PCIe and Ethernet timing use cases, and two technically documented alternative clock generators for frequency synthesis and translation tasks.

Technical Context

The SI5338F-B-GMR implements a dual-stage PLL architecture: a reference-stage PLL locks to one of six input sources (crystal, CMOS, SSTL/HSTL, or differential), followed by four independent MultiSynth™ fractional-N synthesizers - each driving a configurable output buffer. This enables true any-frequency synthesis with zero ppm accuracy per output.

Each output supports independent voltage (1.5/1.8/2.5/3.3 V), format, frequency, phase offset (±45 ns in <20 ps steps), and spread-spectrum modulation (0.5–5.0% spread, 33–63 kHz rate). Loss-of-lock and loss-of-signal alarms are provided, and configuration is performed via I²C/SMBus with ClockBuilder Pro software.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3 SRNS and Gen 4 common clock jitter requirements.
Output Count & Type	Four differential outputs (CLK0A/B through CLK3A/B); supports up to eight single-ended clocks via reconfiguration.
Frequency Range	0.16–710 MHz per output; LVPECL/LVDS up to 710 MHz, HCSL up to 250 MHz, CMOS up to 200 MHz.
Input Flexibility	Supports 8–30 MHz crystal, 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL, or 5–710 MHz differential reference.
Supply & Power	Single 1.8/2.5/3.3 V core supply; 45 mA typical core current at 100 MHz on all outputs and 25 MHz refclk.
Operating Temp	–40 °C to +85 °C ambient; qualified for industrial and telecom line card deployment.
Package	24-pin QFN, 4 mm × 4 mm, 0.5 mm pitch; exposed thermal pad for thermal management.

Pinout & Package

SI5338F-B-GMR is housed in a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with an exposed thermal pad. Pin assignments follow Skyworks' standard Si5338 pinout layout.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2	Differential input pair #1	Accepts 5–710 MHz AC-coupled differential clock; internal 100 Ω termination enabled.
IN3, IN4	Single-ended input pair	Supports 5–200 MHz CMOS-level inputs; VIH = 0.7×VDD, VIL = 0.3×VDD.
IN5, IN6	Differential input pair #2	Second 5–710 MHz differential input path; independent of IN1/IN2 for multi-reference operation.
CLK0A, CLK0B	Differential output #0	LVPECL/LVDS/HCSL/CML configurable; independently voltage- and format-programmable.
CLK1A, CLK1B	Differential output #1	Same configurability as CLK0; supports independent phase offset and SSC modulation.
CLK2A, CLK2B	Differential output #2	Independent frequency synthesis path; supports integer/fractional-N MultiSynth™ operation.
CLK3A, CLK3B	Differential output #3	Fourth fully independent output; capable of glitchless frequency increment/decrement in 1 ppm steps.
VDDO0–VDDO3	Output buffer supplies	Four dedicated 1.4–3.63 V supplies enabling mixed-voltage output configurations.
VDD	Core supply	1.8/2.5/3.3 V ± tolerance; powers PLL, MultiSynth™ engines, and control logic.
SCL, SDA	I²C interface	Standard SMBus-compatible 2-wire bus; supports 400 kHz fast-mode operation.
INTR	Interrupt output	Open-drain status indicator for loss-of-lock or loss-of-signal events.
GND, RSVD_GND	Ground terminals	Multiple GND pins including reserved ground for noise isolation and return path integrity.

Key Features

Feature	Design Value
MultiSynth™ synthesis	Four independent fractional-N synthesizers enable simultaneous zero-ppm-accuracy clocks at arbitrary frequencies.
PCIe Gen 3 SRNS & Gen 4 compliance	Validated 0.11–0.45 ps RMS jitter performance under PCIe-defined measurement conditions and filter profiles.
Programmable phase adjustment	±45 ns range in <20 ps resolution per output; enables precise inter-clock alignment in multi-lane SerDes systems.
Glitchless frequency tuning	1 ppm step size with pin-controlled or I²C-initiated increment/decrement; no output interruption during update.
Flexible spread-spectrum	Configurable on any output: 0.5–5.0% down-spread, 33–63 kHz modulation rate, reducing EMI in dense PCB layouts.
External feedback mode	Enables zero-delay clock distribution by routing output back to feedback input, eliminating propagation delay accumulation.

Applications

Ethernet Switch Timing	PCIe Gen 4 Root Complex
Use Scenario: Synchronizing 10 GbE PHYs, MACs, and packet buffers in Layer 3 switches with deterministic latency. IC Role / Device Role / Timing Role: Quad-output clock generator providing independent 156.25 MHz (XAUI), 125 MHz (RX/TX), 250 MHz (PHY interface), and 100 MHz (management controller) clocks. Use Value: Eliminates four discrete oscillators; reduces board area by >60% and ensures sub-100 ps inter-output skew critical for SerDes lane deskew.	Use Scenario: Delivering low-jitter reference clocks to CPU, GPU, and NVMe controllers in server motherboards. IC Role / Device Role / Timing Role: PCIe Gen 4 Common Clock source meeting 0.45 ps RMS jitter limit at 100 MHz with SRNS-compliant spectral profile. Use Value: Enables full Gen 4 link training without jitter-induced training failures; supports dynamic frequency scaling via I²C.
Broadcast Video Sync	FPGA I/O Clocking
Use Scenario: Generating SMPTE ST 2082 (12G-SDI) pixel clock, reference sync, audio sample rate, and genlock signals in video routers. IC Role / Device Role / Timing Role: Any-frequency synthesizer producing 594 MHz (12G-SDI), 27 MHz (SDI), 48 kHz (AES), and 10 MHz (genlock) simultaneously. Use Value: Replaces crystal bank + fanout buffer; achieves <1 ps RMS jitter on 594 MHz output, preserving eye diagram integrity.	Use Scenario: Providing multiple domain clocks (transceiver, fabric, memory, and debug) to Xilinx Versal or Intel Agilex FPGAs. IC Role / Device Role / Timing Role: Configurable clock source supporting LVDS (transceiver), HCSL (DDR4), CMOS (logic), and SSTL (memory interface) outputs. Use Value: Single-chip solution eliminates level translators and discrete buffers; simplifies power sequencing with independent VDDO supplies.

Ethernet Switch Timing

PCIe Gen 4 Root Complex

Use Scenario: Synchronizing 10 GbE PHYs, MACs, and packet buffers in Layer 3 switches with deterministic latency.

IC Role / Device Role / Timing Role: Quad-output clock generator providing independent 156.25 MHz (XAUI), 125 MHz (RX/TX), 250 MHz (PHY interface), and 100 MHz (management controller) clocks.

Use Value: Eliminates four discrete oscillators; reduces board area by >60% and ensures sub-100 ps inter-output skew critical for SerDes lane deskew.

Use Scenario: Delivering low-jitter reference clocks to CPU, GPU, and NVMe controllers in server motherboards.

IC Role / Device Role / Timing Role: PCIe Gen 4 Common Clock source meeting 0.45 ps RMS jitter limit at 100 MHz with SRNS-compliant spectral profile.

Use Value: Enables full Gen 4 link training without jitter-induced training failures; supports dynamic frequency scaling via I²C.

Broadcast Video Sync

FPGA I/O Clocking

Use Scenario: Generating SMPTE ST 2082 (12G-SDI) pixel clock, reference sync, audio sample rate, and genlock signals in video routers.

IC Role / Device Role / Timing Role: Any-frequency synthesizer producing 594 MHz (12G-SDI), 27 MHz (SDI), 48 kHz (AES), and 10 MHz (genlock) simultaneously.

Use Value: Replaces crystal bank + fanout buffer; achieves <1 ps RMS jitter on 594 MHz output, preserving eye diagram integrity.

Use Scenario: Providing multiple domain clocks (transceiver, fabric, memory, and debug) to Xilinx Versal or Intel Agilex FPGAs.

IC Role / Device Role / Timing Role: Configurable clock source supporting LVDS (transceiver), HCSL (DDR4), CMOS (logic), and SSTL (memory interface) outputs.

Use Value: Single-chip solution eliminates level translators and discrete buffers; simplifies power sequencing with independent VDDO supplies.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output programmable clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D-GM	Higher integration: 8 outputs, integrated crystal, lower jitter (0.35 ps RMS), but larger 32-QFN package and higher cost.	Preferred for new designs requiring >4 outputs or ultra-low jitter in 5G baseband or optical transport.	Select when needing ≥8 outputs or sub-0.4 ps jitter; not drop-in due to pin count, footprint, and register map differences.
ICS853S01AGI-01LFT	Fixed-function 4-output LVDS generator; no I²C programming, no frequency flexibility, 1.2 ps RMS jitter.	Suitable only for static clock trees where all frequencies are known at design stage.	Choose only for cost-sensitive, high-volume applications with unchanging clock requirements; lacks synthesis capability.

Compared with Si5332A-D-GM and ICS853S01AGI-01LFT, the SI5338F-B-GMR uniquely balances field-programmability, PCIe Gen 4 compliance, and compact 24-QFN packaging - making it optimal for upgradeable systems requiring post-silicon clock tuning without hardware revision.

Availability

SI5338F-B-GMR is available at Aetrix Electronics and suitable for Ethernet switch/router, PCIe Gen 1–4 host platforms, and broadcast video timing applications requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5338F-B-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The Si5338 family was engineered for high-density, multi-protocol timing consolidation in networking, computing, and broadcast equipment - delivering programmable precision without sacrificing jitter performance or board space.

FAQ

What is the maximum output frequency supported by SI5338F-B-GMR in LVPECL mode?

The SI5338F-B-GMR supports up to 710 MHz in LVPECL output mode, as specified in Table 6 of the datasheet. This applies when using differential outputs with appropriate termination and layout practices to maintain signal integrity and jitter performance. The device achieves this using its MultiSynth™ fractional-N synthesis engine operating within the VCO frequency range.

Does SI5338F-B-GMR support PCIe Gen 4 Common Clock compliance out of the box?

Yes, SI5338F-B-GMR is designed to meet PCIe Gen 4 Common Clock jitter requirements (≤0.45 ps RMS) when configured per Skyworks' recommended settings - including PLL bandwidth of 2–4 MHz, CDR = 10 MHz, and HCSL 100 MHz output. Validation data is provided in Table 12 of the datasheet Rev. 1.6.

Can SI5338F-B-GMR generate four different frequencies simultaneously?

Yes, SI5338F-B-GMR can synthesize four independent frequencies simultaneously - one per output driver (CLK0 through CLK3) - with zero ppm accuracy using its patented MultiSynth™ technology. Each output is fully configurable for frequency, format, voltage, phase, and spread-spectrum parameters without mutual interference.

What input reference options does SI5338F-B-GMR support?

SI5338F-B-GMR supports six input reference types: 8–30 MHz crystal (differential), 5–200 MHz CMOS, 5–350 MHz SSTL or HSTL, and 5–710 MHz differential (AC-coupled). Input selection is programmable via I²C registers, enabling flexible system-level clock tree design and redundancy.

Is ClockBuilder Pro software required to configure SI5338F-B-GMR?

No, ClockBuilder Pro is optional but strongly recommended for SI5338F-B-GMR configuration. The device supports full I²C register-level programming; however, ClockBuilder Pro automates MultiSynth™ parameter calculation, validates jitter performance, generates initialization scripts, and exports configuration files - significantly reducing development time and risk of misconfiguration.

SI5338F-B-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: Yes

Main Purpose:: Ethernet, Fibre Channel, PCI Express (PCIe), Telecom

Input:: CML, CMOS, HCSL, HSCL, HSTL, LVDS, LVPECL, SSTL, Crystal

Output:: HCSL, HSTL, LVCMOS, LVDS, LVPECL, SSTL

Number of Circuits:: 1

Ratio - Input:Output:: 2:4

Differential - Input:Output:: Yes/Yes

Frequency - Max:: 200MHz

Voltage - Supply:: 1.71V ~ 3.63V

Operating Temperature:: -40°C ~ 85°C

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338F-B-GMR FAQ

1.How can I place an order for SI5338F-B-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338F-B-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338F-B-GMR reliable?

The price and inventory of SI5338F-B-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338F-B-GMR is usually 5 days.

3.What payment methods are accepted for SI5338F-B-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338F-B-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338F-B-GMR?

SI5338F-B-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338F-B-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338F-B-GMR?

For technical support, including SI5338F-B-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338F-B-GMR requirements.

6.How does Aetrix verify that SI5338F-B-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338F-B-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338F-B-GMR meets industry standards.

7.What is the process for return or replacement of SI5338F-B-GMR?

All SI5338F-B-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338F-B-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338F-B-GMR part is unused and in its original packaging.

Return procedure for SI5338F-B-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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