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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338H-B04835-GM

Name: SI5338H-B04835-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338H-B04835-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338H-B04835-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338H-B04835-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338H-B04835-GM from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C. It replaces up to four crystal oscillators in Ethernet switch/router, PCIe, and FPGA clocking applications.

For engineers reviewing the SI5338H-B04835-GM datasheet, SI5338H-B04835-GM pinout, SI5338H-B04835-GM application, or SI5338H-B04835-GM equivalent, key selection criteria include its MultiSynth™-based any-frequency synthesis (0.16–710 MHz), independent output voltage per driver (1.5/1.8/2.5/3.3 V), spread-spectrum capability (0.5–5.0% at 33–63 kHz), loss-of-lock/loss-of-signal alarms, and 4×4 mm 24-QFN package.

Technical Context

The SI5338H-B04835-GM implements a two-stage PLL architecture: a high-performance integer-N PLL (Stage 1) locks to one of six input references (crystal, CMOS, SSTL/HSTL, or differential), followed by four independent MultiSynth™ fractional-N synthesizers (Stage 2) generating each output. Each MultiSynth supports programmable initial phase offset (±45 ns), glitchless frequency increment/decrement (1 ppm steps), and <20 ps phase step resolution.

Output drivers support LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats with independent VDDO supplies (1.4–3.63 V), enabling mixed-voltage system clock distribution. The device operates from a single core supply (1.8/2.5/3.3 V) with 45 mA typical core current and includes I²C/SMBus interface, INTR alarm pin, and OTP NVM for factory programming.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps - meets PCIe Gen 4 common clock RMS jitter requirement (≤0.45 ps typical) under specified test conditions
Output Frequency Range	0.16–710 MHz - supports LVPECL/LVDS up to 710 MHz, HCSL up to 250 MHz, CMOS up to 200 MHz
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz) - enables flexible system-level clock sourcing
Supply Voltages	VDD = 1.71–3.63 V; VDDOx = 1.4–3.63 V - allows independent output voltage control per driver for multi-rail systems
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch - surface-mount compatible with standard PCB assembly and thermal management
Operating Temperature	–40 to +85 °C - qualified for industrial and telecom line card environments
PCIe Compliance	Gen 1/2/3/4 Common Clock & Gen 3 SRNS - validated per PCI-SIG specifications using Intel Clock Jitter Tool

Pinout & Package

SI5338H-B04835-GM uses a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Rev. 1.6 datasheet Section 7 and Figure 1 (Top View).

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2	Differential input pair	Accepts 5–710 MHz AC-coupled differential reference; requires external 100 Ω termination
IN3, IN4	Single-ended input pair	Supports 5–200 MHz CMOS inputs; VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A, CLK0B to CLK3A, CLK3B	Differential output pairs	Four independent outputs; each configurable as LVPECL/LVDS/HCSL/CML with dedicated VDDOx supply
VDDO0–VDDO3	Output buffer supplies	Independent 1.4–3.63 V supplies per output bank enable mixed-signal voltage domain interfacing
SCL, SDA	I²C/SMBus interface	Standard 2-wire serial bus for configuration; supports 400 kHz fast-mode operation
INTR	Interrupt output	Open-drain status pin asserting on loss-of-lock or loss-of-signal events
VDD	Core supply	Single 1.71–3.63 V supply powering PLL, synthesizers, and logic; PSRR optimized
GND, RSVD_GND	Ground connections	Multiple ground pins and reserved ground pad ensure low-impedance return path and thermal dissipation

Key Features

Feature	Design Value
Any-frequency synthesis per output	MultiSynth™ technology delivers true zero-ppm accuracy across all four outputs without external components
Independent output format & voltage	Each of four outputs supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL with user-selectable VDDO (1.5/1.8/2.5/3.3 V)
Glitchless frequency tuning	Pin-controlled or I²C-based frequency increment/decrement in 1 ppm steps, update time ≤667 ns
Programmable spread spectrum	Configurable on any output: spread range 0.5–5.0%, modulation rate 33–63 kHz, supports EMI reduction
Loss-of-signal & loss-of-lock detection	Dedicated INTR pin asserts within 5 µs (LOS) or 10 ms (LOL); enables real-time system monitoring
PCIe Gen 4-compliant jitter	0.15–0.45 ps RMS jitter measured per PCI-SIG Base Spec 4.0 rev. 0.5 using Intel Clock Jitter Tool

Applications

Ethernet Switch/Router Timing	PCIe Gen 1–4 Clock Distribution
Use Scenario: High-density 1/10 GbE switching fabric requiring synchronous clocking across multiple PHYs, MACs, and packet processors. IC Role / Device Role / Timing Role: Quad-output clock generator providing independent 125 MHz, 156.25 MHz, and 312.5 MHz clocks with sub-ps jitter to meet IEEE 802.3 and PCI-SIG timing budgets. Use Value: Eliminates need for four discrete oscillators; reduces board area by >60% and improves jitter margin by 2.5× vs. legacy solutions.	Use Scenario: Server motherboard with CPU, GPU, NVMe SSD, and add-in cards requiring synchronized PCIe reference clocks. IC Role / Device Role / Timing Role: Common clock source delivering 100 MHz HCSL to all PCIe endpoints while meeting Gen 4 SRNS RMS jitter ≤0.32 ps. Use Value: Enables single-point clock distribution with deterministic skew (<100 ps) and eliminates inter-lane jitter accumulation.
Broadcast Video/Audio Synchronization	FPGA & Processor Clocking
Use Scenario: SMPTE ST 2082/2110 IP video transport system requiring precise 27 MHz, 74.25 MHz, and 148.5 MHz pixel clocks. IC Role / Device Role / Timing Role: Any-frequency synthesizer generating exact broadcast-standard frequencies from a single 25 MHz crystal reference. Use Value: Achieves zero-ppm frequency accuracy and <10 ps cycle-cycle jitter-critical for lip-sync and frame-accurate genlock.	Use Scenario: Heterogeneous SoC/FPGA platform with ARM cores, DDR4 memory, and high-speed SerDes needing multiple domain-specific clocks. IC Role / Device Role / Timing Role: Configurable clock source delivering 500 MHz processor clock, 1333 MHz DDR4 clock, and 10 GHz SerDes reference via internal PLL multiplication. Use Value: Reduces BOM count by consolidating clock trees; simplifies layout with single 4×4 mm footprint and unified I²C control.

Ethernet Switch/Router Timing

PCIe Gen 1–4 Clock Distribution

Use Scenario: High-density 1/10 GbE switching fabric requiring synchronous clocking across multiple PHYs, MACs, and packet processors.

IC Role / Device Role / Timing Role: Quad-output clock generator providing independent 125 MHz, 156.25 MHz, and 312.5 MHz clocks with sub-ps jitter to meet IEEE 802.3 and PCI-SIG timing budgets.

Use Value: Eliminates need for four discrete oscillators; reduces board area by >60% and improves jitter margin by 2.5× vs. legacy solutions.

Use Scenario: Server motherboard with CPU, GPU, NVMe SSD, and add-in cards requiring synchronized PCIe reference clocks.

IC Role / Device Role / Timing Role: Common clock source delivering 100 MHz HCSL to all PCIe endpoints while meeting Gen 4 SRNS RMS jitter ≤0.32 ps.

Use Value: Enables single-point clock distribution with deterministic skew (<100 ps) and eliminates inter-lane jitter accumulation.

Broadcast Video/Audio Synchronization

FPGA & Processor Clocking

Use Scenario: SMPTE ST 2082/2110 IP video transport system requiring precise 27 MHz, 74.25 MHz, and 148.5 MHz pixel clocks.

IC Role / Device Role / Timing Role: Any-frequency synthesizer generating exact broadcast-standard frequencies from a single 25 MHz crystal reference.

Use Value: Achieves zero-ppm frequency accuracy and <10 ps cycle-cycle jitter-critical for lip-sync and frame-accurate genlock.

Use Scenario: Heterogeneous SoC/FPGA platform with ARM cores, DDR4 memory, and high-speed SerDes needing multiple domain-specific clocks.

IC Role / Device Role / Timing Role: Configurable clock source delivering 500 MHz processor clock, 1333 MHz DDR4 clock, and 10 GHz SerDes reference via internal PLL multiplication.

Use Value: Reduces BOM count by consolidating clock trees; simplifies layout with single 4×4 mm footprint and unified I²C control.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D05889-GM	Higher integration: 8 outputs, integrated jitter cleaner, lower 0.23 ps RMS jitter; larger 5×5 mm 32-QFN package	Targeted at ultra-low-jitter 100G/400G optical modules and AI accelerator boards where jitter budget is <0.3 ps RMS	Select when system requires >4 outputs or sub-0.3 ps RMS jitter; not drop-in due to pin count, package, and register map differences
ICS8430I-01T	Fixed-frequency quad LVDS generator (no I²C programming); 1.2 ps RMS jitter; 3.3 V only; 32-pin TQFP	Suitable for cost-sensitive, static-clocking applications like legacy telecom line cards where frequency flexibility is unnecessary	Choose for non-programmable, high-volume deployments with fixed 100/125/156.25 MHz outputs; requires PCB redesign due to TQFP footprint and lack of I²C

Compared with Si5332A-D05889-GM and ICS8430I-01T, the SI5338H-B04835-GM uniquely balances programmability, jitter performance (0.7 ps RMS), compact 4×4 mm QFN packaging, and PCIe Gen 4 compliance-making it optimal for space-constrained, multi-protocol embedded systems requiring field-upgradable clock configurations.

Availability

SI5338H-B04835-GM is available at Aetrix Electronics and suitable for Ethernet switch/router timing, PCIe Gen 1–4 clock distribution, and FPGA & processor clocking requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338H-B04835-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The SI5338H-B04835-GM belongs to Skyworks' Si5338 family of I²C-programmable quad clock generators, designed specifically for high-density, multi-protocol systems requiring flexible, low-jitter clock synthesis in minimal PCB area.

FAQ

What is the maximum output frequency supported by SI5338H-B04835-GM in LVPECL mode?

The SI5338H-B04835-GM supports LVPECL outputs up to 710 MHz, as confirmed in Table 6 of the Skyworks Rev. 1.6 datasheet. This capability applies when using differential outputs with appropriate termination and layout practices to maintain signal integrity and jitter performance.

Does SI5338H-B04835-GM support PCIe Gen 4 Common Clock compliance?

Yes, SI5338H-B04835-GM is explicitly validated for PCIe Gen 4 Common Clock compliance with 0.15–0.45 ps RMS jitter, per PCI-SIG Base Specification 4.0 rev. 0.5. Test data is documented in Table 12 of the Skyworks Rev. 1.6 datasheet and verified using the Intel Clock Jitter Tool.

Can SI5338H-B04835-GM generate different output voltages simultaneously on its four outputs?

Yes, SI5338H-B04835-GM supports independent VDDO supplies (VDDO0–VDDO3) ranging from 1.4 V to 3.63 V, allowing simultaneous LVPECL (2.5 V), LVDS (1.8 V), HCSL (1.5 V), and CMOS (3.3 V) outputs without level-shifting circuitry.

What input reference types does SI5338H-B04835-GM accept?

SI5338H-B04835-GM accepts six input reference types: 8–30 MHz crystal, 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL, and 5–710 MHz differential signals. Input flexibility is detailed in Section 3.2 and Table 6 of the Skyworks Rev. 1.6 datasheet.

Is SI5338H-B04835-GM pin-compatible with other Si5338 variants?

Yes, all Si5338 variants-including SI5338H-B04835-GM-share identical 24-QFN pinout and package dimensions (4 × 4 mm). Pin compatibility is confirmed in Skyworks datasheet Section 8 ("Device Pinout by Part Number") and enables hardware reuse across frequency and feature variants.

SI5338H-B04835-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338H-B04835-GM FAQ

1.How can I place an order for SI5338H-B04835-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338H-B04835-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338H-B04835-GM reliable?

The price and inventory of SI5338H-B04835-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338H-B04835-GM is usually 5 days.

3.What payment methods are accepted for SI5338H-B04835-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338H-B04835-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338H-B04835-GM?

SI5338H-B04835-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338H-B04835-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338H-B04835-GM?

For technical support, including SI5338H-B04835-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338H-B04835-GM requirements.

6.How does Aetrix verify that SI5338H-B04835-GM is sourced from the original manufacturer or authorized distributors?

All SI5338H-B04835-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338H-B04835-GM meets industry standards.

7.What is the process for return or replacement of SI5338H-B04835-GM?

All SI5338H-B04835-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338H-B04835-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338H-B04835-GM part is unused and in its original packaging.

Return procedure for SI5338H-B04835-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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