Skyworks Solutions Inc. SI5338H-B04836-GMR

Overview

SI5338H-B04836-GMR from Skyworks Solutions is a quad-output, I²C-programmable clock generator with MultiSynth™ frequency synthesis, delivering four independent differential or single-ended clocks (0.16–710 MHz), 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 compliance, and operation from 1.8/2.5/3.3 V core supply in a 4×4 mm 24-QFN package. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338H-B04836-GMR datasheet, SI5338H-B04836-GMR pinout, SI5338H-B04836-GMR application, or SI5338H-B04836-GMR equivalent, key selection criteria include PCIe SRNS compliance, per-output voltage configurability (1.5–3.3 V), independent phase/frequency adjustment (±45 ns / 1 ppm steps), spread-spectrum support (0.5–5.0% at 33–63 kHz), and loss-of-lock/loss-of-signal alarm functionality.

Technical Context

The SI5338H-B04836-GMR implements a two-stage PLL architecture: a high-stability reference stage (with crystal or external clock input) feeding a fractional-N VCO, followed by four independent MultiSynth™ synthesis blocks-each with programmable R, M, and P dividers-to generate precise output frequencies. Its synthesis resolution is 1 ppb for outputs below Fvco/8.

Each of the four output drivers supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats with independent VDDO supplies (1.4–3.63 V), enabling mixed-voltage system clocking. Input flexibility includes differential (5–710 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), and crystal (8–30 MHz) references, with external feedback mode supporting zero-delay operation.

Key Specifications

Pinout & Package

SI5338H-B04836-GMR uses a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed across Si5338 family variants per Skyworks Rev. 1.6 datasheet Figure 1 (Top View).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output programmable clock generator applications.

Compared with Si5332A-D06981-GM and ICS8430I-01T, the SI5338H-B04836-GMR uniquely balances programmability, PCIe Gen 4 readiness, and compact 24-QFN packaging-making it optimal for space-constrained, high-speed serial interface timing where field reconfiguration and mixed-voltage support are required.

Availability

SI5338H-B04836-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switch clocking, and broadcast video timing applications requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338H-B04836-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs for infrastructure, automotive, and mobile markets.

The Si5338 product line delivers highly configurable, low-jitter clock generation for high-speed serial interfaces-including PCIe, Ethernet, Fibre Channel, and broadcast video-enabling system architects to consolidate timing functions and reduce design complexity.

FAQ

What is the maximum output frequency supported by SI5338H-B04836-GMR?

The SI5338H-B04836-GMR supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, 250 MHz on HCSL, and 200 MHz on CMOS. However, only two unique frequencies above 350 MHz can be generated simultaneously-specifically Fvco/4 and Fvco/6-as defined in the synthesis architecture. All outputs maintain 0.7 ps RMS typical jitter within their respective ranges.

Does SI5338H-B04836-GMR support PCIe Gen 4 Common Clock compliance?

Yes, the SI5338H-B04836-GMR meets PCIe Gen 4 Common Clock jitter specifications with ≤0.45 ps RMS (10 kHz–50 MHz) when configured per Skyworks AN562 guidelines-using appropriate PLL bandwidth (2–5 MHz), CDR settings (10 MHz), and HCSL 100 MHz outputs. This compliance is verified using the Skyworks PCIe Clock Jitter Tool and Intel Clock Jitter Tool v1.6.4.

Can SI5338H-B04836-GMR operate with a 25 MHz crystal reference?

No-SI5338H-B04836-GMR supports crystal inputs only in the 8–30 MHz range per Tables 8–11 of the datasheet. A 25 MHz crystal falls within the supported 26–30 MHz band and is fully compatible, provided load capacitance (17–19 pF recommended) and ESR (<75 Ω) meet specification. Crystal drive level must remain ≤100 µW.

How many independent voltage supplies does SI5338H-B04836-GMR support for its outputs?

The SI5338H-B04836-GMR provides four independent output buffer supply pins-VDDO0 through VDDO3-each configurable from 1.4 V to 3.63 V. This enables simultaneous generation of LVPECL (2.5 V), LVDS (1.8 V), HCSL (1.5 V), and CMOS (3.3 V) signals from a single device, eliminating level-shifting components in mixed-voltage systems.

Is SI5338H-B04836-GMR pin-compatible with other Si5338 variants?

Yes-SI5338H-B04836-GMR shares the identical 24-QFN package, pinout, and electrical interface with all Si5338 family members (e.g., SI5338A, SI5338B, SI5338C). Differences reside solely in factory-programmed NVM content (frequency plan, output formats, startup configuration); hardware replacement requires reprogramming via I²C or ClockBuilder Pro.