Skyworks Solutions Inc. SI5338J-B04983-GM
- Part No.:
- SI5338J-B04983-GM
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Application Specific Clock/Timing
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
SI5338J-B04983-GM.pdf
- Description:
- I2C CONTROL, 4-OUTPUT, ANY FREQU
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI5338J-B04983-GM from Skyworks Solutions is a quad-output, I²C-programmable clock generator with MultiSynth™ frequency synthesis, delivering four independent differential or single-ended clocks (0.16–710 MHz), 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation from 1.8/2.5/3.3 V core supply. It replaces up to four crystal oscillators in high-speed serial interface timing applications.
For engineers reviewing the SI5338J-B04983-GM datasheet, SI5338J-B04983-GM pinout, SI5338J-B04983-GM application, or SI5338J-B04983-GM equivalent, this device supports precise any-frequency synthesis, independent output voltage per driver (1.5–3.3 V), glitchless 1 ppm frequency adjustment, <20 ps phase step resolution, and spread-spectrum control for EMI reduction - critical for PCIe, Ethernet, and FPGA clocking designs.
Technical Context
The SI5338J-B04983-GM implements a two-stage PLL architecture: a high-stability reference stage (with crystal or external clock input) feeding a fractional-N MultiSynth™ synthesis stage per output, enabling integer- or fractional-mode generation across four independent outputs. Each output path includes programmable divider chains (R/M/N/P), configurable output drivers, and dedicated voltage supplies (VDDO0–VDDO3).
It supports flexible reference inputs: 8–30 MHz crystal, 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL, or 5–710 MHz differential; and delivers output formats including LVPECL (0.16–710 MHz), LVDS (0.16–350 MHz), HCSL (0.16–250 MHz), CMOS (0.16–200 MHz), and SSTL/HSTL (0.16–350 MHz), all with independent format and voltage selection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output count & type | 4 independent differential or single-ended clock outputs, configurable per channel |
| Phase jitter (RMS) | 0.7 ps typical (12 kHz–20 MHz), meeting PCIe Gen 3/4 SRNS and GbE jitter requirements |
| Frequency range | 0.16–710 MHz per output; supports >350 MHz on up to two outputs simultaneously (Fvco/4 & Fvco/6) |
| Input reference support | Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz) |
| Supply voltages | Core: 1.8/2.5/3.3 V ±10%; Output buffers: independently selectable 1.5/1.8/2.5/3.3 V per driver |
| Package | 24-pin QFN, 4 × 4 mm, 0.5 mm pitch, exposed thermal pad |
| Operating temperature | –40 °C to +85 °C ambient, qualified for industrial and telecom line card environments |
Pinout & Package
SI5338J-B04983-GM is housed in a 24-lead, 4 × 4 mm QFN package with wettable flank leads and an exposed thermal pad (pin 24 = GND). The package supports reflow soldering per JEDEC J-STD-020 (peak 260 °C) and provides low thermal resistance (θJA = 37 °C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN1, IN2 | Differential reference input pair | Accepts 5–710 MHz AC-coupled differential clock; internal 100 Ω termination enabled |
| IN3, IN4 | Single-ended reference inputs | Support 5–200 MHz CMOS-level clocks; VIH/VIL referenced to VDD |
| CLK0A, CLK0B – CLK3A, CLK3B | Differential clock outputs (4 pairs) | Each pair independently configurable as LVPECL/LVDS/HCSL/CML; voltage set by VDDO0–VDDO3 |
| VDDO0–VDDO3 | Output buffer supply rails | Enable per-output voltage selection (1.5/1.8/2.5/3.3 V) for mixed-signal system interfacing |
| SCL, SDA | I²C/SMBus programming interface | Supports standard/fast-mode I²C (up to 400 kHz); enables full register configuration and status readback |
| INTR | Interrupt output | Open-drain signal indicating loss-of-lock (LOL) or loss-of-signal (LOS) events |
| VDD | Core supply | 1.8/2.5/3.3 V ±10% input; powers PLL, logic, and memory; PSRR optimized for noise immunity |
| GND, RSVD_GND | Ground connections | Multiple ground pins and exposed thermal pad ensure low-impedance return paths and thermal dissipation |
Key Features
| Feature | Design Value |
|---|---|
| MultiSynth™ synthesis per output | Enables true zero-ppm frequency accuracy on all four outputs without external crystals or VCXOs |
| Independent output voltage per driver | Eliminates level-shifting components when driving mixed-voltage devices (e.g., 1.8 V FPGA + 3.3 V PHY) |
| Glitchless frequency increment/decrement | Adjusts output frequency in precise 1 ppm steps via pin control or I²C, preserving system synchronization |
| Programmable phase offset per output | Provides <20 ps step resolution and ±45 ns range for skew compensation across high-speed SerDes lanes |
| Configurable spread spectrum | Reduces EMI by applying user-defined down-spread (0.5–5.0%) at modulation rates of 33–63 kHz on any output |
| Loss-of-lock and loss-of-signal detection | Generates interrupt alerts within 5–10 ms (LOL) or 2.6–5 µs (LOS), enabling fail-safe system recovery |
Applications
| PCIe Gen 3/4 Root Complex | Ethernet Switch Timing |
|---|---|
Use Scenario: Providing synchronized common-clock reference to multiple PCIe endpoints and root ports in server backplanes or AI accelerators. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four 100 MHz HCSL clocks compliant with PCIe Gen 3 SRNS and Gen 4 jitter specs. Use Value: Meets 0.11–0.45 ps RMS jitter requirement for PCIe Gen 4 Common Clock mode without external jitter cleaners. |
Use Scenario: Generating multi-rate clocks (125 MHz, 156.25 MHz, 312.5 MHz) for 1/10/25/100 GbE switch ASICs and PHYs. IC Role / Device Role / Timing Role: Any-frequency synthesizer producing exact IEEE 802.3-compliant frequencies from a single crystal reference. Use Value: Replaces three discrete oscillators while maintaining <0.7 ps RMS jitter across all outputs for deterministic packet latency. |
| FPGA/ASIC Clock Domain Crossing | Broadcast Video Synchronization |
Use Scenario: Supplying independent, phase-aligned clocks to FPGA fabric, transceivers, and DDR interfaces in broadcast-grade video processing systems. IC Role / Device Role / Timing Role: Configurable quad clock source with programmable initial phase offset (<20 ps steps) and independent format selection (LVDS, HCSL, CMOS). Use Value: Enables sub-nanosecond inter-clock alignment across heterogeneous IP blocks, reducing setup/hold violations in high-speed data paths. |
Use Scenario: Distributing SMPTE ST 2059-2 PTP-synchronized reference clocks (e.g., 27 MHz, 74.25 MHz, 148.5 MHz) across camera, encoder, and switcher modules. IC Role / Device Role / Timing Role: Low-jitter, I²C-reprogrammable generator supporting frame-accurate genlock and lip-sync across distributed AV infrastructure. Use Value: Achieves <10 ps pk-pk period jitter and supports external feedback for zero-delay mode, ensuring stable timing under PTP grandmaster drift. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad-output clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5332A-D05889-GM | Higher integration: integrated crystal, lower jitter (0.35 ps RMS), dual-loop architecture, supports JESD204B deterministic latency | Targeted at JESD204B ADC/DAC timing and ultra-low-jitter RF sampling; lacks spread-spectrum capability | Preferred for radar, wireless infrastructure, or high-resolution data converters where jitter budget is <0.4 ps RMS |
| ICS853S02IAGLF | Fixed-frequency, non-programmable; 2-output LVDS; 0.9 ps RMS jitter; no I²C interface or MultiSynth™ flexibility | Used in cost-sensitive, static-clock applications (e.g., legacy storage controllers); no frequency agility or voltage configurability | Selected only when design requires simple, unchanging 100/125 MHz LVDS clocks and board space is constrained |
Compared with Si5332A-D05889-GM and ICS853S02IAGLF, SI5338J-B04983-GM uniquely balances field-programmability, PCIe Gen 4 compliance, spread-spectrum EMI control, and per-output voltage/format flexibility - making it optimal for adaptable, multi-standard timing in networking and compute platforms where reference agility and layout efficiency are critical.
Availability
SI5338J-B04983-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch designs, 100 GbE line cards, and FPGA-based broadcast video equipment requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for SI5338J-B04983-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global leader in analog semiconductors, specializing in precision timing, RF, and connectivity solutions for high-performance communications infrastructure.
The Si5338 family was engineered for high-density, multi-protocol timing in next-generation networking and computing systems - delivering programmable, low-jitter clock synthesis in compact QFN packages to replace discrete oscillator arrays.
FAQ
What is the primary function of the SI5338J-B04983-GM in a system?
The SI5338J-B04983-GM serves as a quad-output, I²C-programmable clock generator that synthesizes four independent, low-jitter clock signals from a single reference. Its MultiSynth™ technology enables precise any-frequency generation (0.16–710 MHz) with 0 ppm accuracy, replacing multiple discrete oscillators in applications like PCIe Gen 4, Ethernet switches, and FPGA clock trees. SI5338J-B04983-GM integrates flexible input support, per-output voltage control, and spread-spectrum capability to simplify timing architecture.
Does the SI5338J-B04983-GM support PCIe Gen 4 Common Clock mode?
Yes, the SI5338J-B04983-GM is explicitly specified for PCIe Gen 4 Common Clock mode, delivering ≤0.45 ps RMS jitter (10 kHz–50 MHz) when configured with HCSL outputs at 100 MHz. It meets the PCI-SIG Gen 4 jitter mask under standard operating conditions (VDD = 3.3 V, TA = 25 °C) and supports the required PLL loop bandwidth (2–5 MHz) and CDR rate (10 MHz). SI5338J-B04983-GM also complies with PCIe Gen 3 SRNS and Gen 1/2/3 Common Clock specifications.
How many different output voltage levels can be configured simultaneously on the SI5338J-B04983-GM?
The SI5338J-B04983-GM supports four independent output buffer supply rails (VDDO0–VDDO3), each configurable for 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This allows simultaneous operation of up to four distinct output voltage levels - for example, driving a 1.8 V FPGA transceiver bank, a 2.5 V SerDes PHY, a 3.3 V legacy controller, and a 1.5 V memory interface - without external level shifters. SI5338J-B04983-GM's per-driver voltage control is hardware-configurable via I²C registers and retained in OTP memory.
Can the SI5338J-B04983-GM generate frequencies above 350 MHz on all four outputs?
No - the SI5338J-B04983-GM can generate frequencies above 350 MHz on only two outputs simultaneously, specifically at Fvco/4 and Fvco/6 (e.g., 367–473.33 MHz or 550–710 MHz), due to VCO frequency constraints and synthesis stage limitations. All four outputs support 0.16–350 MHz continuously. SI5338J-B04983-GM's datasheet explicitly restricts >350 MHz operation to two unique frequencies at a time, regardless of output format (LVPECL, LVDS, or HCSL).
What programming interface does the SI5338J-B04983-GM use, and is external hardware required?
The SI5338J-B04983-GM uses a standard I²C/SMBus-compatible 2-wire serial interface (SCL/SDA) for full register configuration, status monitoring, and OTP programming. No external hardware programmer is required: configuration is performed using Skyworks' ClockBuilder Pro software, which generates custom configuration files and supports in-system programming via USB-to-I²C adapters or host processor GPIO. SI5338J-B04983-GM retains settings in one-time-programmable (OTP) memory after power cycle.
SI5338J-B04983-GM Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- MultiSynth™
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- PLL:
- -
- Main Purpose:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 24-QFN (4x4)
SI5338J-B04983-GM FAQ
1.How can I place an order for SI5338J-B04983-GM through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5338J-B04983-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5338J-B04983-GM reliable?
The price and inventory of SI5338J-B04983-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338J-B04983-GM is usually 5 days.
3.What payment methods are accepted for SI5338J-B04983-GM?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338J-B04983-GM transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5338J-B04983-GM?
SI5338J-B04983-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5338J-B04983-GM order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5338J-B04983-GM?
For technical support, including SI5338J-B04983-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338J-B04983-GM requirements.
6.How does Aetrix verify that SI5338J-B04983-GM is sourced from the original manufacturer or authorized distributors?
All SI5338J-B04983-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338J-B04983-GM meets industry standards.
7.What is the process for return or replacement of SI5338J-B04983-GM?
All SI5338J-B04983-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338J-B04983-GM, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5338J-B04983-GM part is unused and in its original packaging.
Return procedure for SI5338J-B04983-GM:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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