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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338K-B04065-GM

Name: SI5338K-B04065-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338K-B04065-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338K-B04065-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338K-B04065-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338K-B04065-GM from Skyworks Solutions is a quad-output, I²C-programmable clock generator with MultiSynth™ frequency synthesis. It delivers four independent, zero-ppm-accurate output clocks (0.16–710 MHz) in LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats, each configurable for voltage (1.5–3.3 V), phase (±45 ns), and spread spectrum. It supports PCIe Gen 1–4 common clock and SRNS modes, and operates across –40 to +85 °C in a 4 × 4 mm 24-QFN package.

For engineers reviewing the SI5338K-B04065-GM datasheet, SI5338K-B04065-GM pinout, SI5338K-B04065-GM application, or SI5338K-B04065-GM equivalent, key selection criteria include differential jitter performance (0.7 ps RMS typ), flexible input reference support (8–710 MHz), independent output voltage per driver, glitchless 1-ppm frequency increment/decrement, and PCIe Gen 4 compliance with 0.15–0.45 ps RMS jitter.

Technical Context

The SI5338K-B04065-GM implements a two-stage PLL architecture: a high-stability integer-N PLL (Stage 1) locks to an external reference (crystal, CMOS, or differential), followed by four independent MultiSynth™ fractional-N synthesizers (Stage 2) generating outputs with 1 ppb resolution. Each output path includes programmable drive strength, slew rate control, and selectable termination.

It features loss-of-signal and loss-of-lock detection, I²C/SMBus interface with register-based configuration, on-chip OTP NVM for factory programming, and pin-controlled frequency/phase adjustment. The device supports external feedback for zero-delay mode and offers independent SSC modulation per output (0.5–5.0% spread, 33–63 kHz rate).

Key Specifications

Parameter	Value and Actual Design Meaning
Output count & type	Four differential clock outputs (CLK0A/B through CLK3A/B), configurable as LVPECL/LVDS/HCSL/CML or single-ended CMOS/SSTL/HSTL
Frequency range per output	0.16–710 MHz (LVPECL/LVDS/CML); 0.16–250 MHz (HCSL); 0.16–200 MHz (CMOS); 0.16–350 MHz (SSTL/HSTL)
Phase jitter (RMS)	0.7 ps typical (12 kHz–20 MHz), measured at 125 MHz output with 25 MHz crystal input
PCIe compliance	Gen 1/2/3/4 Common Clock; Gen 3 SRNS compliant with ≤0.32 ps RMS jitter
Supply & power	Core: 1.8/2.5/3.3 V (±10%); Output buffers: 1.4–3.63 V; Core current: 45 mA typ at 100 MHz all outputs
Operating temperature	–40 °C to +85 °C ambient, qualified per industrial grade requirements
Package	24-pin QFN, 4 mm × 4 mm, 0.5 mm pitch, exposed thermal pad

Pinout & Package

SI5338K-B04065-GM uses a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed per the Si5338 family: inputs (IN1–IN6), outputs (CLK0A/B–CLK3A/B), supply rails (VDD, VDDO0–VDDO3), control (SCL, SDA, INTR, OEB), and reserved ground (RSVD_GND).

Pin/Terminal	Circuit Role	Design Meaning
IN1/IN2, IN5/IN6	Differential input pairs	Accept 5–710 MHz AC-coupled differential clocks; require external 100 Ω termination
IN3/IN4	Single-ended input pins	Support 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL; internally biased
CLK0A/CLK0B–CLK3A/CLK3B	Differential output pairs	Four independent outputs; each pair supports LVPECL/LVDS/HCSL/CML with per-driver VDDO supply
VDDO0–VDDO3	Output buffer supplies	Independent 1.4–3.63 V supplies per output bank; enable mixed-voltage system interfacing
SCL/SDA	I²C interface	Standard SMBus-compatible serial interface (up to 400 kHz); used for full register configuration and status readback
INTR	Interrupt output	Open-drain active-low signal indicating loss-of-lock, loss-of-signal, or other fault conditions

Key Features

Feature	Design Value
MultiSynth™ synthesis	Four independent fractional-N synthesizers enabling any-frequency generation (0.16–710 MHz) with true zero-ppm accuracy per output
Glitchless frequency tuning	Pin- or I²C-controlled frequency increment/decrement in 1 ppm steps without output interruption
Per-output phase control	Programmable initial phase offset (–45 to +45 ns) and fine phase adjustment (<20 ps step resolution)
Configurable spread spectrum	Independent SSC per output: 0.5–5.0% spread, 33–63 kHz modulation rate, adjustable center/down-spread
Input flexibility	Supports 8–30 MHz crystal, 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL, or 5–710 MHz differential reference
Low-power operation	45 mA core supply current typical at full load; optimized PSRR enables robust noise immunity on shared rails

Applications

PCIe Gen 4 Server Backplane	Ethernet Switch Timing
Use Scenario: High-speed server motherboard requiring synchronized 100 MHz reference clocks for CPU, PCIe root complex, and switch fabric. IC Role / Device Role / Timing Role: Quad-output clock generator providing PCIe Gen 4-compliant common clock (≤0.45 ps RMS jitter) and separate SRNS reference to CDR circuits. Use Value: Eliminates four discrete oscillators; enables precise inter-clock skew control (<100 ps) and dynamic frequency margining via I²C.	Use Scenario: 10 GbE/25 GbE Ethernet switch ASIC requiring multiple low-jitter clocks (125 MHz, 156.25 MHz, 312.5 MHz) with independent phase alignment. IC Role / Device Role / Timing Role: Programmable clock source delivering four independent frequencies with <20 ps phase step resolution for SerDes lane deskew. Use Value: Replaces fixed-frequency XO array; supports multi-rate PHY operation and field-upgradable timing configurations via ClockBuilder Pro.
Broadcast Video Sync Generator	FPGA-Based Test Equipment
Use Scenario: SMPTE ST 2082/2081 video router needing genlock-capable 74.25 MHz, 148.5 MHz, and 297 MHz clocks with sub-ns phase stability. IC Role / Device Role / Timing Role: Precision clock synthesizer using external 10 MHz GPSDO reference to generate broadcast-grade video clocks with <0.7 ps RMS jitter. Use Value: Meets SMPTE ST 2059-2 jitter limits; enables frame-accurate switching via programmable phase offsets and loss-of-signal alarms.	Use Scenario: Automated test equipment FPGA platform requiring reconfigurable clocks (10–300 MHz) for stimulus generation, sampling, and protocol analysis. IC Role / Device Role / Timing Role: Flexible clock engine supporting dynamic frequency changes during test sequences without reset or glitch. Use Value: Enables real-time clock rate adaptation via PINC/FDEC pins; reduces BOM count and PCB area versus discrete oscillator + divider solutions.

PCIe Gen 4 Server Backplane

Ethernet Switch Timing

Use Scenario: High-speed server motherboard requiring synchronized 100 MHz reference clocks for CPU, PCIe root complex, and switch fabric.

IC Role / Device Role / Timing Role: Quad-output clock generator providing PCIe Gen 4-compliant common clock (≤0.45 ps RMS jitter) and separate SRNS reference to CDR circuits.

Use Value: Eliminates four discrete oscillators; enables precise inter-clock skew control (<100 ps) and dynamic frequency margining via I²C.

Use Scenario: 10 GbE/25 GbE Ethernet switch ASIC requiring multiple low-jitter clocks (125 MHz, 156.25 MHz, 312.5 MHz) with independent phase alignment.

IC Role / Device Role / Timing Role: Programmable clock source delivering four independent frequencies with <20 ps phase step resolution for SerDes lane deskew.

Use Value: Replaces fixed-frequency XO array; supports multi-rate PHY operation and field-upgradable timing configurations via ClockBuilder Pro.

Broadcast Video Sync Generator

FPGA-Based Test Equipment

Use Scenario: SMPTE ST 2082/2081 video router needing genlock-capable 74.25 MHz, 148.5 MHz, and 297 MHz clocks with sub-ns phase stability.

IC Role / Device Role / Timing Role: Precision clock synthesizer using external 10 MHz GPSDO reference to generate broadcast-grade video clocks with <0.7 ps RMS jitter.

Use Value: Meets SMPTE ST 2059-2 jitter limits; enables frame-accurate switching via programmable phase offsets and loss-of-signal alarms.

Use Scenario: Automated test equipment FPGA platform requiring reconfigurable clocks (10–300 MHz) for stimulus generation, sampling, and protocol analysis.

IC Role / Device Role / Timing Role: Flexible clock engine supporting dynamic frequency changes during test sequences without reset or glitch.

Use Value: Enables real-time clock rate adaptation via PINC/FDEC pins; reduces BOM count and PCB area versus discrete oscillator + divider solutions.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output programmable clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D06185-GM	Higher integration: 8 outputs, integrated LDOs, lower jitter (0.35 ps RMS), supports JESD204B deterministic latency	Targeted at high-channel-count data converters and 5G wireless infrastructure where deterministic delay matters	Choose for JESD204B systems or when >4 outputs required; higher cost and larger 32-QFN package
ICS85411AGI-01LF	Fixed-function 4-output LVDS clock fanout buffer; no synthesis, no I²C, no voltage flexibility; 1.2 ps RMS jitter	Used only as a passive distribution device with external master clock; no frequency translation capability	Choose only if design requires simple clock replication without frequency agility or mixed-voltage support

Compared with Si5332A-D06185-GM, SI5338K-B04065-GM offers lower cost and smaller footprint but lacks JESD204B latency control; compared with ICS85411AGI-01LF, it provides full programmability and synthesis at the expense of higher complexity and power.

Availability

SI5338K-B04065-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 server platforms, 10/25 GbE switch designs, and broadcast video timing systems requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5338K-B04065-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and industrial markets.

The Si5338 product line was designed for high-performance, multi-protocol clock generation in space-constrained systems-enabling consolidation of multiple oscillators into a single programmable IC with PCIe, Ethernet, and broadcast timing compliance.

FAQ

What is the primary function of the SI5338K-B04065-GM?

The SI5338K-B04065-GM is a quad-output, I²C-programmable clock generator that synthesizes four independent, zero-ppm-accurate output frequencies from a single reference input. It replaces up to four discrete oscillators while supporting PCIe Gen 1–4, Ethernet, broadcast video, and FPGA clocking applications with ultra-low jitter (0.7 ps RMS typical).

Does the SI5338K-B04065-GM support PCIe Gen 4 Common Clock compliance?

Yes, the SI5338K-B04065-GM meets PCIe Gen 4 Common Clock jitter requirements with ≤0.45 ps RMS (12 kHz–20 MHz) when configured per Skyworks' recommended settings-including 2–4 MHz PLL bandwidth and 10 MHz CDR filter. This is verified in Table 12 of the official datasheet Rev. 1.6.

How many different output voltage levels can be configured simultaneously on the SI5338K-B04065-GM?

The SI5338K-B04065-GM supports four independent output supply rails (VDDO0–VDDO3), allowing each of its four output banks to operate at a different voltage: 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This enables direct interfacing with mixed-voltage SoCs, FPGAs, and ASICs without level-shifting components.

Can the SI5338K-B04065-GM generate frequencies above 350 MHz on all four outputs simultaneously?

No. While the SI5338K-B04065-GM supports up to 710 MHz on individual outputs, only two unique frequencies above 350 MHz can be generated simultaneously-specifically Fvco/4 and Fvco/6-as stated in Note 6 of Table 6. Other outputs must be ≤350 MHz or use integer-related frequencies below that threshold.

Is ClockBuilder Pro software required to configure the SI5338K-B04065-GM?

ClockBuilder Pro is not required but strongly recommended for SI5338K-B04065-GM configuration. It provides GUI-based frequency planning, jitter optimization, register file generation, and hardware validation. The device can also be programmed directly via I²C using custom firmware, though register-level development is significantly more complex and error-prone.

SI5338K-B04065-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338K-B04065-GM FAQ

1.How can I place an order for SI5338K-B04065-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338K-B04065-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338K-B04065-GM reliable?

The price and inventory of SI5338K-B04065-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338K-B04065-GM is usually 5 days.

3.What payment methods are accepted for SI5338K-B04065-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338K-B04065-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338K-B04065-GM?

SI5338K-B04065-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338K-B04065-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338K-B04065-GM?

For technical support, including SI5338K-B04065-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338K-B04065-GM requirements.

6.How does Aetrix verify that SI5338K-B04065-GM is sourced from the original manufacturer or authorized distributors?

All SI5338K-B04065-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338K-B04065-GM meets industry standards.

7.What is the process for return or replacement of SI5338K-B04065-GM?

All SI5338K-B04065-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338K-B04065-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338K-B04065-GM part is unused and in its original packaging.

Return procedure for SI5338K-B04065-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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