Skyworks Solutions Inc. SI5338K-B05614-GM
- Part No.:
- SI5338K-B05614-GM
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Application Specific Clock/Timing
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
SI5338K-B05614-GM.pdf
- Description:
- I2C CONTROL, 4-OUTPUT, ANY FREQU
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI5338K-B05614-GM from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in high-speed serial interface timing applications.
For engineers reviewing the SI5338K-B05614-GM datasheet, SI5338K-B05614-GM pinout, SI5338K-B05614-GM application, or SI5338K-B05614-GM equivalent, key selection considerations include its MultiSynth™-based any-frequency synthesis (0.16–710 MHz per output), independent output voltage control (1.5/1.8/2.5/3.3 V), spread-spectrum capability (0.5–5.0% down-spread), and I²C/SMBus programmability with ClockBuilder Pro support.
Technical Context
The SI5338K-B05614-GM implements a two-stage PLL architecture: a high-stability integer-N PLL (Stage 1) locks to one of six input references (crystal, CMOS, SSTL/HSTL, or differential), followed by four independent MultiSynth™ fractional-N synthesizers (Stage 2) generating each output. Each MultiSynth supports integer or fractional mode, enabling true zero-ppm frequency accuracy and <20 ps phase step resolution.
Its output stage provides per-driver configurability for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats, with independent VDDO supplies and on-chip termination. Input-to-output propagation delay is 2.5–4 ns in buffer mode, and loss-of-signal/loss-of-lock alarms are supported via dedicated INTR pin.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Count & Type | 4 independent outputs; configurable as differential (LVPECL/LVDS/HCSL/CML) or single-ended (CMOS/SSTL/HSTL) |
| Frequency Range | 0.16–710 MHz per output; supports >350 MHz only at Fvco/4 and Fvco/6 simultaneously |
| Phase Jitter (RMS) | 0.7 ps typical (12 kHz–20 MHz); compliant with PCIe Gen 3 SRNS and Gen 4 Common Clock specs |
| Input Reference Support | Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz) |
| Supply Voltages | Core: 1.8/2.5/3.3 V ±10%; Output buffers: 1.4–3.63 V per VDDOx rail |
| Operating Temperature | –40 to +85 °C ambient; qualified for industrial and telecom line card environments |
| Package | 24-pin QFN, 4 × 4 mm, 0.5 mm pitch, exposed thermal pad |
Pinout & Package
SI5338K-B05614-GM is housed in a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments follow the standard Si5338 top-view layout.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN1, IN2 | Differential input pair #1 | Accepts 5–710 MHz AC-coupled differential reference; requires external 100 Ω termination |
| IN3, IN4 | Single-ended input pair | Supports CMOS/SSTL/HSTL inputs (5–350 MHz); VIH = 0.7×VDD, VIL = 0.3×VDD |
| IN5, IN6 | Differential input pair #2 | Second 5–710 MHz differential reference path; identical electrical specs to IN1/IN2 |
| CLK0A, CLK0B | Differential output #0 | Configurable format (LVPECL/LVDS/HCSL/CML); driven by MultiSynth #0 |
| CLK1A, CLK1B | Differential output #1 | Independent MultiSynth #1; supports same formats and voltage ranges as CLK0 |
| CLK2A, CLK2B | Differential output #2 | MultiSynth #2 output; full frequency/format configurability with independent VDDO2 |
| CLK3A, CLK3B | Differential output #3 | MultiSynth #3 output; supports phase adjustment <20 ps step resolution |
| VDDO0–VDDO3 | Output buffer supply rails | Independent 1.4–3.63 V supplies per output driver; enables mixed-voltage system interfacing |
| VDD | Core supply | 1.8/2.5/3.3 V ±10%; powers PLL, logic, and memory; PSRR optimized for noise immunity |
| SCL, SDA | I²C/SMBus interface | Standard 100/400 kHz operation; supports ClockBuilder Pro configuration and runtime reprogramming |
| INTR | Interrupt output | Open-drain status indicator for loss-of-signal (LOS) and loss-of-lock (LOL) events |
| GND, RSVD_GND | Ground connections | Multiple GND pins including reserved ground for noise isolation; connects to exposed thermal pad |
Key Features
| Feature | Design Value |
|---|---|
| Any-frequency synthesis per output | Four independent MultiSynth™ engines enable simultaneous generation of unrelated frequencies (e.g., 100 MHz PCIe + 156.25 MHz Ethernet + 200 MHz FPGA + 312.5 MHz SerDes) with 0 ppm error |
| PCIe Gen 1–4 timing compliance | Meets PCIe Gen 3 SRNS (0.11–0.32 ps RMS) and Gen 4 Common Clock (0.15–0.45 ps RMS) jitter requirements using certified test methodology |
| Glitchless frequency tuning | Independent FINC/FDEC pins allow real-time frequency adjustment in 1 ppm steps without output interruption or phase discontinuity |
| Programmable spread spectrum | Per-output SSC with adjustable spread (0.5–5.0%), modulation rate (33–63 kHz), and center frequency (5–350 MHz) for EMI reduction |
| Flexible reference input | Supports six reference types - crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), and differential (5–710 MHz) - enabling reuse across diverse board designs |
Applications
| PCIe Gen 4 Switch Timing | Ethernet Switch Clocking |
|---|---|
Use Scenario: Providing synchronized 100 MHz common clock to multiple PCIe Gen 4 switch ICs in a data center fabric card. IC Role / Device Role / Timing Role: Quad-output clock generator delivering low-jitter, phase-aligned clocks to PCIe root complexes and endpoints. Use Value: Enables Gen 4 compliance with 0.15–0.45 ps RMS jitter; eliminates need for four discrete oscillators and reduces BOM count and layout area. |
Use Scenario: Generating 156.25 MHz and 312.5 MHz clocks for 10GbE/25GbE PHYs and packet processors in enterprise switches. IC Role / Device Role / Timing Role: Frequency translator and buffer, converting a 25 MHz crystal reference into multiple high-speed Ethernet line rates. Use Value: Achieves sub-1 ps RMS jitter required for 25G NRZ signaling; independent output voltage control (1.8 V/2.5 V) matches PHY interface requirements. |
| FPGA/ASIC Clock Distribution | Broadcast Video Sync Generator |
Use Scenario: Supplying 100 MHz system clock, 200 MHz DDR4 interface clock, 300 MHz transceiver reference, and 50 MHz debug clock to a Xilinx Versal ACAP. IC Role / Device Role / Timing Role: Configurable quad clock source with independent format and voltage per output for heterogeneous SoC interfaces. Use Value: Eliminates inter-clock skew via programmable phase offset (±45 ns, <20 ps steps); supports LVDS, HCSL, and CMOS outputs on same device. |
Use Scenario: Generating SMPTE ST 2082 (12G-SDI) 59.94 Hz frame sync, 74.25 MHz pixel clock, 148.5 MHz dual-link, and 297 MHz 4K UHD reference in broadcast camera systems. IC Role / Device Role / Timing Role: Precision timing engine delivering ultra-low-jitter, phase-coherent video clocks with zero ppm accuracy. Use Value: Meets SMPTE jitter limits (<0.2 UI) via 0.7 ps RMS phase jitter; spread-spectrum capability suppresses EMI in RF-sensitive studio environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5332A-D05614-GM | Higher integration: integrated crystal, lower power (32 mA typ), improved jitter (0.45 ps RMS), but fixed 4-output configuration without pin-selectable variants | Preferred for space-constrained designs requiring crystal-less operation and tighter jitter budgets; not suitable where external crystal flexibility is needed | Select when crystal integration and sub-0.5 ps jitter are mandatory; verify compatibility with ClockBuilder Pro v4.x |
| ICS854S01AGI-01LFT | Non-programmable, fixed-frequency quad LVDS generator (100/125/156.25/200 MHz); no I²C interface, no spread spectrum, higher jitter (1.2 ps RMS) | Applicable only in stable, unchanging clock trees; lacks dynamic reconfiguration and EMI mitigation features | Choose only for cost-sensitive, static designs where field updates and jitter headroom are not required |
Compared with Si5332A-D05614-GM, SI5338K-B05614-GM offers greater reference flexibility and field programmability at the cost of slightly higher jitter and external crystal dependency; versus ICS854S01AGI-01LFT, it delivers full frequency agility and jitter performance essential for PCIe Gen 4 and 25G Ethernet.
Availability
SI5338K-B05614-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, 10/25GbE switch clocking, FPGA/ASIC clock distribution, and broadcast video sync generation requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for SI5338K-B05614-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog products for infrastructure, automotive, and industrial markets.
The SI5338 family is designed as a high-performance, software-programmable clock generator platform targeting high-speed serial interface timing in networking, computing, and broadcast equipment where multi-frequency agility and sub-ps jitter are critical.
FAQ
What is the maximum output frequency supported by SI5338K-B05614-GM?
The SI5338K-B05614-GM supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, 250 MHz on HCSL, and 200 MHz on CMOS. However, only two unique frequencies above 350 MHz can be generated simultaneously - specifically Fvco/4 and Fvco/6 - due to VCO architecture constraints confirmed in Table 6 and Section 3.3 of the datasheet.
Does SI5338K-B05614-GM support PCIe Gen 4 Common Clock compliance?
Yes, SI5338K-B05614-GM meets PCIe Gen 4 Common Clock jitter specifications with 0.15–0.45 ps RMS (10 kHz–50 MHz) when configured per AN562 test conditions using HCSL 100 MHz outputs and verified with the Skyworks PCIe Clock Jitter Tool. This compliance is explicitly stated in the Features section and Table 12.
Can SI5338K-B05614-GM generate four completely independent frequencies?
Yes, SI5338K-B05614-GM uses four independent MultiSynth™ fractional-N synthesizers, enabling truly independent frequency generation (e.g., 100.000000 MHz, 125.000001 MHz, 156.250002 MHz, 312.500003 MHz) with zero ppm accuracy and no integer relationship required between outputs.
What input reference options does SI5338K-B05614-GM support?
SI5338K-B05614-GM accepts six reference types: external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL (5–350 MHz), HSTL (5–350 MHz), and two differential inputs (5–710 MHz each). All are validated in Table 6 and Section 3.2, with slew rate requirements specified for optimal jitter performance.
Is ClockBuilder Pro software required to configure SI5338K-B05614-GM?
No, ClockBuilder Pro is optional but strongly recommended: SI5338K-B05614-GM is fully programmable via standard I²C/SMBus commands, but ClockBuilder Pro provides GUI-based configuration, jitter optimization, register file generation, and validation against PCIe/Ethernet standards - significantly reducing development time versus manual register programming.
SI5338K-B05614-GM Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- MultiSynth™
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- PLL:
- -
- Main Purpose:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 24-QFN (4x4)
SI5338K-B05614-GM FAQ
1.How can I place an order for SI5338K-B05614-GM through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5338K-B05614-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5338K-B05614-GM reliable?
The price and inventory of SI5338K-B05614-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338K-B05614-GM is usually 5 days.
3.What payment methods are accepted for SI5338K-B05614-GM?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338K-B05614-GM transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5338K-B05614-GM?
SI5338K-B05614-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5338K-B05614-GM order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5338K-B05614-GM?
For technical support, including SI5338K-B05614-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338K-B05614-GM requirements.
6.How does Aetrix verify that SI5338K-B05614-GM is sourced from the original manufacturer or authorized distributors?
All SI5338K-B05614-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338K-B05614-GM meets industry standards.
7.What is the process for return or replacement of SI5338K-B05614-GM?
All SI5338K-B05614-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338K-B05614-GM, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5338K-B05614-GM part is unused and in its original packaging.
Return procedure for SI5338K-B05614-GM:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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