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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338K-B05614-GMR

Name: SI5338K-B05614-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338K-B05614-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338K-B05614-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338K-B05614-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338K-B05614-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independent differential output drivers, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL output formats across 0.16–710 MHz. It replaces up to four crystal oscillators in high-speed serial interface timing applications such as PCIe root complexes and Ethernet switch fabric.

For engineers reviewing the SI5338K-B05614-GMR datasheet, SI5338K-B05614-GMR pinout, SI5338K-B05614-GMR application, or SI5338K-B05614-GMR equivalent, key selection criteria include its MultiSynth™ fractional-N synthesis architecture, per-output voltage configuration (1.5/1.8/2.5/3.3 V), independent phase/frequency increment/decrement control (<20 ps step accuracy), and 24-QFN package compatibility with PCIe jitter requirements.

Technical Context

The SI5338K-B05614-GMR implements a two-stage synthesis architecture: a primary PLL with 1.6 MHz loop bandwidth locks to one of six input references (crystal, CMOS, SSTL/HSTL, or differential), followed by four independent MultiSynth™ fractional-N dividers generating outputs with true zero-ppm frequency accuracy. Each output stage supports programmable drive strength, slew rate, and termination.

It features loss-of-lock and loss-of-signal detection, external feedback mode for zero-delay operation, and configurable spread-spectrum clocking (0.5–5.0% spread, 33–63 kHz modulation) on any output. The device operates from a single 1.8/2.5/3.3 V core supply with 45 mA typical current draw and –40 to +85 °C industrial temperature range.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps - meets PCIe Gen 3 SRNS and Gen 4 common clock jitter limits
Output Count & Type	4 differential outputs (CLK0A/B–CLK3A/B) - supports simultaneous LVPECL, LVDS, HCSL, or CML signaling
Frequency Range	0.16–710 MHz per output - covers PCIe 100 MHz, Ethernet 125/156.25 MHz, and Fibre Channel 212.5/425 MHz
Input Reference Options	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz) - enables flexible system-level clock tree design
Supply Voltages	VDD = 1.8/2.5/3.3 V; VDDOx = 1.5/1.8/2.5/3.3 V - allows mixed-voltage board designs without level shifters
Package	24-pin QFN, 4 × 4 mm - compatible with standard PCB assembly and thermal management for high-density routing
Operating Temperature	–40 to +85 °C - qualified for industrial and telecom line card environments

Pinout & Package

SI5338K-B05614-GMR uses a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed per the Si5338 family: IN1/IN2, IN5/IN6 (differential inputs), IN3/IN4 (single-ended inputs), CLK0A/CLK0B–CLK3A/CLK3B (four differential output pairs), VDD, VDDO0–VDDO3 (independent output supply pins), SCL/SDA/INTR (I²C interface and interrupt), and GND/RSVD_GND.

Pin/Terminal	Circuit Role	Design Meaning
CLK0A / CLK0B	Differential Output Pair 0	LVPECL/LVDS/HCSL/CML-capable; independently configured frequency, format, and VDDO0 voltage
CLK1A / CLK1B	Differential Output Pair 1	Same configurability as CLK0; supports integer/fractional synthesis with <20 ps phase step resolution
CLK2A / CLK2B	Differential Output Pair 2	Configurable for PCIe Gen 4 common clock (100 MHz) or Ethernet 156.25 MHz with sub-ps jitter
CLK3A / CLK3B	Differential Output Pair 3	Supports high-frequency outputs up to 710 MHz (e.g., Fvco/4 or Fvco/6 modes)
IN1 / IN2, IN5 / IN6	Differential Input Pairs	Accept 5–710 MHz differential clocks; internal 100 Ω termination enabled via register
IN3 / IN4	Single-Ended Input Pins	Accept CMOS/SSTL/HSTL signals (5–350 MHz); slew-rate optimized for low additive jitter
SCL / SDA	I²C Serial Interface	Standard SMBus-compatible bus (up to 400 kHz); used for full device configuration and status readback
INTR	Interrupt Output	Open-drain signal indicating loss-of-lock, loss-of-signal, or PLL unlock events
VDD	Core Supply	1.8/2.5/3.3 V core power; PSRR optimized for noise immunity in mixed-signal systems
VDDO0–VDDO3	Output Buffer Supplies	Independent 1.5/1.8/2.5/3.3 V rails per output pair - eliminates external level translators

Key Features

Feature	Design Value
MultiSynth™ Synthesis	Four independent fractional-N synthesizers enabling true zero-ppm frequency accuracy on all outputs simultaneously
Per-Output Voltage Control	VDDO0–VDDO3 pins allow each output driver to operate at 1.5/1.8/2.5/3.3 V - supports multi-rail FPGA/ASIC clock domains
Glitchless Frequency Adjustment	Independent FINC/FDEC pins enable 1 ppm-step frequency changes without output interruption - critical for dynamic link rate adaptation
Programmable Phase Offset	±45 ns initial phase offset and <20 ps incremental adjustment per output - enables precise skew control across SerDes lanes
Spread Spectrum Clocking	Configurable on any output: 0.5–5.0% spread depth, 33–63 kHz modulation rate - reduces EMI peak emissions in dense PCB layouts
PCIe Gen 3/4 Compliance	Validated for Common Clock and SRNS modes per PCI-SIG specifications - eliminates need for external jitter cleaners in host controller designs

Applications

PCIe Gen 4 Root Complex	Ethernet Switch Fabric
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 endpoints and upstream ports in a server motherboard. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four low-jitter, independently configured PCIe-compliant clocks with matched skew. Use Value: Meets PCIe Gen 4 common clock TJ < 33.6 ps pk-pk and RMS jitter < 0.45 ps, eliminating need for discrete jitter attenuators and reducing BOM count.	Use Scenario: Generating 125 MHz (1 GbE), 156.25 MHz (10 GbE), and 312.5 MHz (25 GbE) clocks for multi-rate Ethernet switch ASICs. IC Role / Device Role / Timing Role: Any-frequency clock synthesizer replacing multiple crystals and buffers in a unified timing solution. Use Value: Achieves 0.7 ps RMS jitter at 156.25 MHz, satisfying IEEE 802.3bj CAUI-4 and 10GBASE-R jitter budgets without external cleanup.
Broadcast Video Timing	FPGA-Based Protocol Converter
Use Scenario: Delivering SMPTE ST 2082 (12G-SDI) 594 MHz and ST 2081 (6G-SDI) 297 MHz reference clocks with sub-10 ps cycle-cycle jitter. IC Role / Device Role / Timing Role: High-frequency differential clock generator supporting HCSL and LVDS outputs for video serializer/deserializer ICs. Use Value: Enables direct connection to SDI PHYs with no additional jitter filtering, preserving eye diagram integrity over long backplane traces.	Use Scenario: Converting between 100 MHz PCIe, 125 MHz Ethernet, and 200 MHz MIPI D-PHY reference frequencies in a reconfigurable SoM. IC Role / Device Role / Timing Role: Frequency translator with independent input reference selection and output format flexibility. Use Value: Supports runtime reconfiguration via I²C to adapt to changing protocol stacks, reducing FPGA logic resource usage for clock domain crossing.

PCIe Gen 4 Root Complex

Ethernet Switch Fabric

Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 endpoints and upstream ports in a server motherboard.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering four low-jitter, independently configured PCIe-compliant clocks with matched skew.

Use Value: Meets PCIe Gen 4 common clock TJ < 33.6 ps pk-pk and RMS jitter < 0.45 ps, eliminating need for discrete jitter attenuators and reducing BOM count.

Use Scenario: Generating 125 MHz (1 GbE), 156.25 MHz (10 GbE), and 312.5 MHz (25 GbE) clocks for multi-rate Ethernet switch ASICs.

IC Role / Device Role / Timing Role: Any-frequency clock synthesizer replacing multiple crystals and buffers in a unified timing solution.

Use Value: Achieves 0.7 ps RMS jitter at 156.25 MHz, satisfying IEEE 802.3bj CAUI-4 and 10GBASE-R jitter budgets without external cleanup.

Broadcast Video Timing

FPGA-Based Protocol Converter

Use Scenario: Delivering SMPTE ST 2082 (12G-SDI) 594 MHz and ST 2081 (6G-SDI) 297 MHz reference clocks with sub-10 ps cycle-cycle jitter.

IC Role / Device Role / Timing Role: High-frequency differential clock generator supporting HCSL and LVDS outputs for video serializer/deserializer ICs.

Use Value: Enables direct connection to SDI PHYs with no additional jitter filtering, preserving eye diagram integrity over long backplane traces.

Use Scenario: Converting between 100 MHz PCIe, 125 MHz Ethernet, and 200 MHz MIPI D-PHY reference frequencies in a reconfigurable SoM.

IC Role / Device Role / Timing Role: Frequency translator with independent input reference selection and output format flexibility.

Use Value: Supports runtime reconfiguration via I²C to adapt to changing protocol stacks, reducing FPGA logic resource usage for clock domain crossing.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D05614-GM	Lower jitter (0.35 ps RMS), integrated crystal option, 32-QFN package; requires different programming flow	Better suited for ultra-low-jitter 100G optical modules where additive jitter must be <0.4 ps RMS	Select when PCIe Gen 5 or OTU4 timing margin is critical; not drop-in due to pinout and register map differences
ICS8430I-01T	Fixed-frequency, non-programmable quad LVDS generator; 1.2 ps RMS jitter; 32-TQFP package	Limited to pre-defined frequencies (e.g., 100/125/156.25 MHz); no spread spectrum or phase adjustment	Choose for cost-sensitive, high-volume applications with static clock trees and no requirement for field reprogramming

Compared with Si5332A-D05614-GM and ICS8430I-01T, SI5338K-B05614-GMR uniquely balances field-programmability, PCIe Gen 4 compliance, and 24-QFN compactness-making it optimal for mid-tier servers and programmable networking hardware where design flexibility and layout density are prioritized over absolute minimum jitter.

Availability

SI5338K-B05614-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 root complexes, Ethernet switch fabric timing, and broadcast video equipment requiring stable component supply and long-term production continuity.

Supply support for SI5338K-B05614-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The Si5338 product line delivers programmable, low-jitter clock generation for high-speed serial interfaces including PCIe, Ethernet, and Fibre Channel-designed to replace multiple discrete oscillators while maintaining signal integrity across complex multi-protocol systems.

FAQ

What is the maximum output frequency supported by SI5338K-B05614-GMR?

The SI5338K-B05614-GMR supports up to 710 MHz on LVPECL/LVDS/CML outputs and 350 MHz on SSTL/HSTL outputs. Frequencies above 350 MHz are limited to two unique values simultaneously (Fvco/4 and Fvco/6), as specified in the functional description section of the datasheet. This capability enables direct clocking of high-speed SerDes lanes without external frequency multipliers.

Does SI5338K-B05614-GMR support PCIe Gen 4 Common Clock compliance?

Yes, SI5338K-B05614-GMR is validated for PCIe Gen 4 Common Clock mode with 0.15–0.45 ps RMS jitter (10 kHz–50 MHz integration band), meeting PCI-SIG Base Specification 4.0 requirements. Its jitter performance is measured using the Skyworks PCIe Clock Jitter Tool and Intel Clock Jitter Tool v1.6.4 under HCSL 100 MHz output conditions.

Can SI5338K-B05614-GMR generate different output voltages on each channel?

Yes, SI5338K-B05614-GMR provides independent VDDO0–VDDO3 supply pins, allowing each of the four differential output pairs to operate at 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This eliminates external level-shifting components when driving mixed-voltage FPGAs, ASICs, or SerDes blocks with differing I/O standards.

How is SI5338K-B05614-GMR programmed in-system?

SI5338K-B05614-GMR is programmed via its I²C/SMBus-compatible serial interface (SCL/SDA pins) operating up to 400 kHz. Configuration is typically performed using Skyworks' ClockBuilder Pro software, which generates register maps and initialization scripts. The device also supports pin-controlled frequency increment/decrement (FINC/FDEC) for real-time dynamic adjustments without host processor intervention.

What input reference options does SI5338K-B05614-GMR support?

SI5338K-B05614-GMR accepts six input reference types: external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), and differential (5–710 MHz). Input pins IN1/IN2 and IN5/IN6 support differential sources, while IN3/IN4 accept single-ended signals. Internal termination and slew-rate optimization ensure minimal additive jitter across all modes.

SI5338K-B05614-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338K-B05614-GMR FAQ

1.How can I place an order for SI5338K-B05614-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338K-B05614-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338K-B05614-GMR reliable?

The price and inventory of SI5338K-B05614-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338K-B05614-GMR is usually 5 days.

3.What payment methods are accepted for SI5338K-B05614-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338K-B05614-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338K-B05614-GMR?

SI5338K-B05614-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338K-B05614-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338K-B05614-GMR?

For technical support, including SI5338K-B05614-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338K-B05614-GMR requirements.

6.How does Aetrix verify that SI5338K-B05614-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338K-B05614-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338K-B05614-GMR meets industry standards.

7.What is the process for return or replacement of SI5338K-B05614-GMR?

All SI5338K-B05614-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338K-B05614-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338K-B05614-GMR part is unused and in its original packaging.

Return procedure for SI5338K-B05614-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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