Skyworks Solutions Inc. SI5338K-B06029-GM

Overview

SI5338K-B06029-GM from Skyworks Solutions is a quad-output, I²C-programmable clock generator implementing MultiSynth™ frequency synthesis. It delivers four independent, any-frequency outputs (0.16–710 MHz) with 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 compliance, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats. It replaces multiple crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338K-B06029-GM datasheet, SI5338K-B06029-GM pinout, SI5338K-B06029-GM application, or SI5338K-B06029-GM equivalent, key selection criteria include differential output jitter performance (0.7 ps RMS), PCIe Gen 4 common-clock RMS jitter (0.15–0.45 ps), independent per-output voltage control (1.5/1.8/2.5/3.3 V), spread-spectrum capability (0.5–5.0% down-spread), and 24-QFN package compatibility with PCB land pattern IPC-7351B.

Technical Context

The SI5338K-B06029-GM integrates a dual-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesis blocks. Each output path includes programmable divider chains (R/M/N/P), configurable output drivers, and per-channel voltage supply pins (VDDO0–VDDO3).

It supports flexible reference inputs - external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) - and enables glitchless frequency adjustment in 1 ppm steps and phase tuning in <20 ps increments. Loss-of-lock and loss-of-signal alarms are integrated for system monitoring.

Key Specifications

Pinout & Package

SI5338K-B06029-GM uses a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments follow Skyworks' standard Si5338 top-view layout: IN1/IN2 (differential ref 1), IN3/IN4 (single-ended ref), IN5/IN6 (differential ref 2), CLK0A/CLK0B through CLK3A/CLK3B (four differential output pairs), VDD (core supply), VDDO0–VDDO3 (independent output buffer supplies), SCL/SDA/INTR (I²C interface and interrupt), and GND/RSVD_GND.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output programmable clock generator applications.

Compared with Si5332A-D06089-GM and ICS8430I-01T, SI5338K-B06029-GM uniquely balances field-programmability, PCIe Gen 4 compliance, and 24-QFN compactness - making it optimal for space-constrained, multi-standard timing in networking and compute platforms where reconfiguration during development or field updates is essential.

Availability

SI5338K-B06029-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switching, broadcast video synchronization, and FPGA-based compute acceleration requiring stable component supply and long-term design-in support.

Supply support for SI5338K-B06029-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for communications, automotive, industrial, and aerospace markets.

The Si5338 product line was designed to replace multiple discrete oscillators with a single, software-configurable clock generator for high-speed serial interfaces - targeting PCIe, Ethernet, Fibre Channel, and broadcast video timing systems.

FAQ

What is the maximum output frequency supported by SI5338K-B06029-GM?

The SI5338K-B06029-GM supports up to 710 MHz on LVPECL/LVDS/CML outputs, 250 MHz on HCSL, and 200 MHz on CMOS. Frequencies above 350 MHz require Fvco/4 or Fvco/6 synthesis modes, limiting simultaneous high-frequency outputs to two unique values. All outputs maintain 0.7 ps RMS typical jitter within their respective ranges.

Does SI5338K-B06029-GM support PCIe Gen 4 Common Clock and SRNS modes?

Yes, SI5338K-B06029-GM is explicitly validated for PCIe Gen 4 Common Clock (0.15–0.45 ps RMS jitter) and Gen 3 Separate Reference No Spread (SRNS) compliance (0.11–0.32 ps RMS). Its PLL bandwidth (2–5 MHz) and jitter performance meet PCI-SIG Base Specification 4.0 rev. 0.5 requirements without external filtering.

How is SI5338K-B06029-GM programmed, and what tools are required?

SI5338K-B06029-GM is programmed via its I²C/SMBus interface using Skyworks' ClockBuilder Pro software. The tool provides GUI-based configuration, real-time jitter simulation, and one-click register file generation. Programming can be performed in-circuit during development or pre-programmed at factory via OTP NVM.

Can SI5338K-B06029-GM generate different output voltages simultaneously?

Yes, SI5338K-B06029-GM supports independent output buffer supplies (VDDO0–VDDO3), enabling simultaneous generation of LVDS at 1.8 V, HCSL at 2.5 V, and CMOS at 3.3 V on separate output pairs. This eliminates level-shifting components and simplifies mixed-voltage system clock distribution.

What reference inputs does SI5338K-B06029-GM accept?

SI5338K-B06029-GM accepts six reference inputs: two differential pairs (IN1/IN2, IN5/IN6) for 5–710 MHz; two single-ended pins (IN3, IN4) for CMOS/SSTL/HSTL (5–350 MHz); and an on-chip oscillator supporting 8–30 MHz crystals. Input flexibility allows seamless integration with legacy oscillators, FPGA clocks, or high-speed SerDes references.