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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338K-B06098-GMR

Name: SI5338K-B06098-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338K-B06098-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338K-B06098-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338K-B06098-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

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Product details

Overview

SI5338K-B06098-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation from 1.8/2.5/3.3 V core supply in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338K-B06098-GMR datasheet, SI5338K-B06098-GMR pinout, SI5338K-B06098-GMR application, or SI5338K-B06098-GMR equivalent, key selection criteria include PCIe jitter compliance, independent output voltage per driver (1.5/1.8/2.5/3.3 V), MultiSynth™ any-frequency synthesis (0.16–710 MHz), spread-spectrum control, and loss-of-lock/loss-of-signal alarm support.

Technical Context

The SI5338K-B06098-GMR implements a two-stage PLL architecture: a high-stability reference stage (Phase Detector + Loop Filter + VCO) feeding four independent MultiSynth™ fractional-N synthesis blocks. Each output path supports integer or fractional mode, enabling true zero-ppm frequency accuracy across all four outputs.

It accepts six input references - including 8–30 MHz crystals, 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL, and 5–710 MHz differential - and delivers configurable output formats (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL) with independent voltage rails (VDDO0–VDDO3) and per-output phase/frequency increment/decrement control at <20 ps step resolution.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3 SRNS & Gen 4 common clock jitter requirements.
Output Frequency Range	0.16–710 MHz per channel; supports LVPECL/LVDS (≤710 MHz), HCSL (≤250 MHz), CMOS (≤200 MHz), SSTL/HSTL (≤350 MHz).
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz).
Supply Voltages	Core: 1.8/2.5/3.3 V ±10%; Output buffers: independently configurable 1.4–3.63 V per VDDO rail.
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch; RoHS-compliant, moisture sensitivity level 3.
Operating Temperature	–40 °C to +85 °C ambient; qualified for industrial and telecom line card environments.
Power Consumption	45 mA typical core current (100 MHz on all outputs, 25 MHz refclk); <30 mA per active LVDS output at 710 MHz.

Pinout & Package

SI5338K-B06098-GMR uses a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed per the Si5338 family: IN1/IN2 (differential ref 1), IN3/IN4 (single-ended ref 2/3), IN5/IN6 (differential ref 4/5), CLK0A/CLK0B through CLK3A/CLK3B (four differential output pairs), VDDO0–VDDO3 (independent output supply rails), VDD (core supply), SCL/SDA (I²C interface), INTR (interrupt output), and RSVD_GND (reserved ground).

Pin/Terminal	Circuit Role	Design Meaning
CLK0A / CLK0B	Differential Output Pair 0	LVPECL/LVDS/HCSL/CML-compatible; independently configured format, frequency, voltage (VDDO0), and phase offset.
CLK1A / CLK1B	Differential Output Pair 1	Same configurability as CLK0; supports integer/fractional synthesis and glitchless frequency adjustment in 1 ppm steps.
CLK2A / CLK2B	Differential Output Pair 2	Configurable per-output spread spectrum (0.5–5.0% spread, 33–63 kHz modulation rate) and loss-of-signal monitoring.
CLK3A / CLK3B	Differential Output Pair 3	Supports external feedback for zero-delay mode; phase adjustable in <20 ps steps with ±45 ns range.
IN1 / IN2	Differential Input 1	Accepts 5–710 MHz AC-coupled differential clock; internal 100 Ω termination; slew rate >0.3 V/ns recommended for low jitter.
IN3 / IN4	Single-Ended Inputs 2 & 3	Accept 5–200 MHz CMOS clocks; VIH = 0.7×VDD, VIL = 0.3×VDD; internal 20 kΩ pull-up/down resistors.
SCL / SDA	I²C Serial Interface	Standard SMBus-compatible 100/400 kHz operation; supports ClockBuilder Pro programming and runtime reconfiguration.
INTR	Interrupt Output	Open-drain status indicator for loss-of-lock (LOL) and loss-of-signal (LOS); active-low assertion.
VDDO0–VDDO3	Output Buffer Supplies	Independent 1.4–3.63 V rails per output pair; enables mixed-voltage system interfacing without level shifters.
VDD	Core Supply	1.8/2.5/3.3 V ±10%; PSRR optimized for clean clock generation in noisy power domains.

Key Features

Feature	Design Value
MultiSynth™ Any-Frequency Synthesis	Four independent output channels each synthesize any frequency from 0.16–710 MHz with 0 ppm error in integer mode.
PCIe Gen 1–4 Timing Compliance	Meets PCIe Gen 3 SRNS and Gen 4 common clock jitter specs (≤0.45 ps RMS) with 2–5 MHz PLL bandwidth configuration.
Per-Output Spread Spectrum	Configurable down-spread (0.5–5.0%) and modulation rate (33–63 kHz) on any output to reduce EMI in dense PCB layouts.
Glitchless Frequency Adjustment	Independent frequency increment/decrement via pin or I²C in 1 ppm steps without output interruption or phase discontinuity.
Programmable Phase Offset	±45 ns range with <20 ps step resolution per output; enables precise skew control for SerDes lane alignment.
Zero-Delay Mode Support	External feedback path allows synchronous clock distribution with matched input-to-output propagation delay (2.5–4 ns typical).

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch/Routing Clocking
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switch ASICs in a data center top-of-rack switch. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent, low-jitter PCIe-compliant clocks with spread spectrum enabled on two outputs to meet FCC Class A emissions limits. Use Value: Eliminates four discrete oscillators; reduces board area by 65% and jitter accumulation across lanes by maintaining sub-0.45 ps RMS per output.	Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs, packet processors, and switch fabric interfaces in carrier-grade Ethernet routers. IC Role / Device Role / Timing Role: Configurable buffer and level translator supporting mixed-voltage (1.8 V/2.5 V/3.3 V) SerDes interfaces with independent output format selection (LVDS/HCSL/CMOS). Use Value: Enables single-device timing for multi-rate Ethernet subsystems; avoids external level shifters and reduces BOM count by 7 components per board.
Broadcast Video Timing	FPGA/Processor Clocking
Use Scenario: Delivering SMPTE ST 2082 (12G-SDI) 297 MHz and ST 2081 (6G-SDI) 148.5 MHz reference clocks with <10 ps cycle-cycle jitter to video encoder/decoder FPGAs. IC Role / Device Role / Timing Role: High-precision frequency translator converting a 27 MHz crystal reference into multiple broadcast-standard frequencies with zero-ppm accuracy. Use Value: Meets SMPTE jitter compliance (≤0.2 UI) without external jitter cleaners; supports frame-accurate genlock via programmable phase offset.	Use Scenario: Supplying 500 MHz processor core clock, 200 MHz DDR4 memory clock, 100 MHz peripheral bus clock, and 25 MHz debug UART clock from a single 25 MHz crystal in an industrial FPGA-based controller. IC Role / Device Role / Timing Role: Quad clock generator operating in free-running mode with independent output voltage rails (1.0 V, 1.2 V, 2.5 V, 3.3 V) matching target IC supply domains. Use Value: Reduces power delivery complexity; eliminates four separate clock trees and associated decoupling networks.

PCIe Gen 4 Switch Timing

Ethernet Switch/Routing Clocking

Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switch ASICs in a data center top-of-rack switch.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent, low-jitter PCIe-compliant clocks with spread spectrum enabled on two outputs to meet FCC Class A emissions limits.

Use Value: Eliminates four discrete oscillators; reduces board area by 65% and jitter accumulation across lanes by maintaining sub-0.45 ps RMS per output.

Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs, packet processors, and switch fabric interfaces in carrier-grade Ethernet routers.

IC Role / Device Role / Timing Role: Configurable buffer and level translator supporting mixed-voltage (1.8 V/2.5 V/3.3 V) SerDes interfaces with independent output format selection (LVDS/HCSL/CMOS).

Use Value: Enables single-device timing for multi-rate Ethernet subsystems; avoids external level shifters and reduces BOM count by 7 components per board.

Broadcast Video Timing

FPGA/Processor Clocking

Use Scenario: Delivering SMPTE ST 2082 (12G-SDI) 297 MHz and ST 2081 (6G-SDI) 148.5 MHz reference clocks with <10 ps cycle-cycle jitter to video encoder/decoder FPGAs.

IC Role / Device Role / Timing Role: High-precision frequency translator converting a 27 MHz crystal reference into multiple broadcast-standard frequencies with zero-ppm accuracy.

Use Value: Meets SMPTE jitter compliance (≤0.2 UI) without external jitter cleaners; supports frame-accurate genlock via programmable phase offset.

Use Scenario: Supplying 500 MHz processor core clock, 200 MHz DDR4 memory clock, 100 MHz peripheral bus clock, and 25 MHz debug UART clock from a single 25 MHz crystal in an industrial FPGA-based controller.

IC Role / Device Role / Timing Role: Quad clock generator operating in free-running mode with independent output voltage rails (1.0 V, 1.2 V, 2.5 V, 3.3 V) matching target IC supply domains.

Use Value: Reduces power delivery complexity; eliminates four separate clock trees and associated decoupling networks.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-A05629-GM	Higher integration: includes integrated crystal, lower jitter (0.35 ps RMS), supports up to 10 outputs, but larger 5 × 5 mm 32-QFN package.	Targeted at space-constrained designs requiring ultra-low jitter and crystal integration; not drop-in compatible due to different pinout and footprint.	Select when crystal integration and sub-0.4 ps jitter are mandatory; requires PCB redesign.
ICS853S01AGI-01LFT	Fixed-frequency quad LVDS buffer (no synthesis); 0.9 ps RMS jitter; 3.3 V only; no I²C or spread spectrum; 16-pin TSSOP package.	Limited to pre-defined frequencies; suitable only for simple fanout/buffering where frequency agility is unnecessary.	Choose only for cost-sensitive, fixed-frequency applications with no need for programmability or multi-voltage support.

Compared with Si5332A-A05629-GM, SI5338K-B06098-GMR offers smaller footprint and broader input flexibility but higher jitter; versus ICS853S01AGI-01LFT, it provides full frequency synthesis and voltage configurability at the cost of higher complexity and price.

Availability

SI5338K-B06098-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switching/routing, and broadcast video timing requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338K-B06098-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 product line delivers programmable, low-jitter clock generation for high-speed serial interfaces including PCIe, Ethernet, Fibre Channel, and broadcast video, emphasizing flexibility, integration, and signal integrity.

FAQ

What is the primary function of the SI5338K-B06098-GMR?

The SI5338K-B06098-GMR is an I²C-programmable quad clock generator that synthesizes four independent, low-jitter output clocks from a single reference input. It replaces multiple discrete oscillators in systems requiring precise, flexible timing-such as PCIe Gen 4 switches, Ethernet routers, and broadcast video equipment-while supporting mixed output formats and voltages.

Does the SI5338K-B06098-GMR support PCIe Gen 4 timing requirements?

Yes, the SI5338K-B06098-GMR meets PCIe Gen 4 common clock jitter specifications (≤0.45 ps RMS, 10 kHz–50 MHz) when configured with a 2–5 MHz PLL bandwidth and appropriate reference input. It is explicitly validated for PCIe Gen 1/2/3/4 Common Clock and Gen 3 SRNS compliance per the Skyworks datasheet Rev. 1.6.

Can the SI5338K-B06098-GMR generate different output voltages simultaneously?

Yes, the SI5338K-B06098-GMR supports independent output supply rails (VDDO0–VDDO3), allowing simultaneous generation of LVDS at 2.5 V, HCSL at 1.8 V, CMOS at 3.3 V, and SSTL at 1.5 V-all from a single device. This eliminates external level shifters in mixed-voltage SoC/FPGA designs.

How is the SI5338K-B06098-GMR programmed and configured?

The SI5338K-B06098-GMR is programmed via its I²C/SMBus-compatible serial interface using Skyworks' ClockBuilder Pro software. Configuration includes output frequency, format, voltage, spread spectrum, phase offset, and alarm thresholds. Factory-programmed configurations are also supported for turnkey deployment.

What package type and thermal characteristics does the SI5338K-B06098-GMR have?

The SI5338K-B06098-GMR uses a 24-pin QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Its thermal resistance is θJA = 37 °C/W (still air) and θJC = 10 °C/W, enabling reliable operation up to +85 °C ambient with standard PCB copper pour and thermal vias under the pad.

SI5338K-B06098-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338K-B06098-GMR FAQ

1.How can I place an order for SI5338K-B06098-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338K-B06098-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338K-B06098-GMR reliable?

The price and inventory of SI5338K-B06098-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338K-B06098-GMR is usually 5 days.

3.What payment methods are accepted for SI5338K-B06098-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338K-B06098-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338K-B06098-GMR?

SI5338K-B06098-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338K-B06098-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338K-B06098-GMR?

For technical support, including SI5338K-B06098-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338K-B06098-GMR requirements.

6.How does Aetrix verify that SI5338K-B06098-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338K-B06098-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338K-B06098-GMR meets industry standards.

7.What is the process for return or replacement of SI5338K-B06098-GMR?

All SI5338K-B06098-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338K-B06098-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338K-B06098-GMR part is unused and in its original packaging.

Return procedure for SI5338K-B06098-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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