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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338L-B05947-GMR

Name: SI5338L-B05947-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338L-B05947-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338L-B05947-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338L-B05947-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

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Product details

Overview

SI5338L-B05947-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C. It replaces up to four crystal oscillators in high-speed serial interface timing applications such as PCIe root complexes and FPGA clock trees.

For engineers reviewing the SI5338L-B05947-GMR datasheet, SI5338L-B05947-GMR pinout, SI5338L-B05947-GMR application, or SI5338L-B05947-GMR equivalent, key selection criteria include its MultiSynth™-based any-frequency synthesis (0.16–710 MHz per output), independent output voltage support (1.5/1.8/2.5/3.3 V), spread-spectrum capability (0.5–5.0% down-spread), and 24-QFN package compatibility with space-constrained board layouts.

Technical Context

The SI5338L-B05947-GMR implements a two-stage PLL architecture: a high-stability reference PLL (Stage 1) locks to one of six input sources (crystal, CMOS, SSTL/HSTL, or differential), followed by four independent MultiSynth™ fractional-N synthesizers (Stage 2) generating each output. Each synthesizer supports integer or fractional mode, enabling true zero-ppm frequency accuracy and <20 ps programmable phase step resolution.

Its output stage provides per-driver configurability for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats, with independent VDDO supplies and on-chip termination. The device supports glitchless frequency increment/decrement via dedicated pins or I²C, and includes loss-of-lock and loss-of-signal alarms for system-level fault monitoring.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count & type	Four independently configurable outputs: up to four differential (LVPECL/LVDS/HCSL/CML) or eight single-ended (CMOS/SSTL/HSTL), or mixed
Frequency range	0.16–710 MHz per output; supports Fvco/4 and Fvco/6 for >350 MHz outputs (two unique frequencies max)
Phase jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3 SRNS (0.11–0.32 ps RMS) and Gen 4 common clock (0.15–0.45 ps RMS)
Input flexibility	Supports 8–30 MHz crystal, 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL, or 5–710 MHz differential reference
Supply & power	1.8/2.5/3.3 V core supply; 1.4–3.63 V per output bank; 45 mA typical core current at 100 MHz on all outputs
Operating temperature	–40 to +85 °C ambient; qualified per industrial-grade reliability requirements
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch, exposed thermal pad

Pinout & Package

SI5338L-B05947-GMR is housed in a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed across the Si5338 family and validated per Skyworks Document Rev. 1.6.

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential clock inputs	Accept 5–710 MHz AC-coupled differential references; require external 100 Ω termination
IN3, IN4	Single-ended clock inputs	Accept 5–200 MHz CMOS-level signals; support DC-coupled operation with internal biasing
CLK0A/CLK0B to CLK3A/CLK3B	Differential output pairs	Four fully independent output drivers; each pair supports LVPECL/LVDS/HCSL/CML with selectable VDDO
VDDO0–VDDO3	Output buffer supply rails	Independent 1.4–3.63 V supplies per output bank; enable mixed-voltage signaling on same device
VDD	Core supply	1.8/2.5/3.3 V ± tolerance; powers PLL, synthesizers, and control logic
SCL, SDA	I²C interface	SMBus-compatible 100/400 kHz interface for configuration and status readback
INTR	Interrupt output	Open-drain alarm signal indicating loss-of-lock or loss-of-signal events
OEB, PINC, FINC	Control inputs	Hardware-controlled output enable, phase/frequency increment/decrement (glitchless, 1 ppm/20 ps steps)

Key Features

Feature	Design Value
MultiSynth™ synthesis	Four independent fractional-N synthesizers enabling any-frequency generation (0.16–710 MHz) with 0 ppm precision per output
PCIe compliance	Fully compliant with PCIe Gen 1/2/3/4 Common Clock and Gen 3 Separate Reference No Spread (SRNS) jitter requirements
Flexible output configuration	Per-output format selection (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL), voltage (1.5/1.8/2.5/3.3 V), and termination
Spread spectrum	Configurable on any output: 5–350 MHz range, 0.5–5.0% spread depth, 33–63 kHz modulation rate
Glitchless tuning	Hardware-supported phase/frequency adjustment in <20 ps / 1 ppm steps without output interruption
Alarm monitoring	Dedicated INTR pin reports loss-of-lock and loss-of-signal conditions for real-time system diagnostics

Applications

PCIe Gen 4 Root Complex Timing	Ethernet Switch Clock Tree
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 endpoints and switch fabric in enterprise servers. IC Role / Device Role / Timing Role: Quad-output clock generator delivering low-jitter, spread-spectrum-enabled clocks meeting PCIe Gen 4 common clock jitter spec (0.15–0.45 ps RMS). Use Value: Eliminates need for four discrete oscillators; reduces BOM count and layout area while maintaining Gen 4 compliance across all lanes.	Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs, packet processors, and SerDes in Layer 3 switches. IC Role / Device Role / Timing Role: Programmable frequency translator converting a single 25 MHz crystal into multiple Ethernet-standard frequencies with independent output formats. Use Value: Enables single-reference design with precise inter-channel skew control (<100 ps) and per-port spread-spectrum tuning to reduce EMI.
FPGA/ASIC Clock Distribution	Broadcast Video Synchronization
Use Scenario: Supplying core logic, transceiver, and memory interface clocks to Xilinx Versal or Intel Agilex FPGAs in broadcast infrastructure equipment. IC Role / Device Role / Timing Role: Configurable quad clock generator supporting mixed-voltage outputs (1.8 V LVDS for transceivers, 1.2 V HSTL for DDR interfaces) from one device. Use Value: Reduces PCB layer count by consolidating clock sources; simplifies power sequencing with single-core supply and independent VDDO rails.	Use Scenario: Delivering SMPTE ST 2059-2–compliant 27 MHz, 74.25 MHz, and 148.5 MHz reference clocks to video encoders, decoders, and genlock modules in IP-based broadcast systems. IC Role / Device Role / Timing Role: High-precision, low-phase-noise clock generator with sub-ns phase alignment between outputs for frame-accurate synchronization. Use Value: Achieves <±45 ns initial phase offset and <20 ps incremental adjustment-critical for lip-sync and multi-camera genlock.

PCIe Gen 4 Root Complex Timing

Ethernet Switch Clock Tree

Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 endpoints and switch fabric in enterprise servers.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering low-jitter, spread-spectrum-enabled clocks meeting PCIe Gen 4 common clock jitter spec (0.15–0.45 ps RMS).

Use Value: Eliminates need for four discrete oscillators; reduces BOM count and layout area while maintaining Gen 4 compliance across all lanes.

Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs, packet processors, and SerDes in Layer 3 switches.

IC Role / Device Role / Timing Role: Programmable frequency translator converting a single 25 MHz crystal into multiple Ethernet-standard frequencies with independent output formats.

Use Value: Enables single-reference design with precise inter-channel skew control (<100 ps) and per-port spread-spectrum tuning to reduce EMI.

FPGA/ASIC Clock Distribution

Broadcast Video Synchronization

Use Scenario: Supplying core logic, transceiver, and memory interface clocks to Xilinx Versal or Intel Agilex FPGAs in broadcast infrastructure equipment.

IC Role / Device Role / Timing Role: Configurable quad clock generator supporting mixed-voltage outputs (1.8 V LVDS for transceivers, 1.2 V HSTL for DDR interfaces) from one device.

Use Value: Reduces PCB layer count by consolidating clock sources; simplifies power sequencing with single-core supply and independent VDDO rails.

Use Scenario: Delivering SMPTE ST 2059-2–compliant 27 MHz, 74.25 MHz, and 148.5 MHz reference clocks to video encoders, decoders, and genlock modules in IP-based broadcast systems.

IC Role / Device Role / Timing Role: High-precision, low-phase-noise clock generator with sub-ns phase alignment between outputs for frame-accurate synchronization.

Use Value: Achieves <±45 ns initial phase offset and <20 ps incremental adjustment-critical for lip-sync and multi-camera genlock.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D05947-GM	Higher integration: 8 outputs, integrated LDOs, lower jitter (0.35 ps RMS), supports JESD204B deterministic latency	Targeted at JESD204B-compliant data converters and high-end FPGA designs requiring deterministic delay control	Choose when needing >4 outputs, tighter jitter, or deterministic latency; requires different PCB layout and power design
ICS8430I-01T	Fixed-frequency, non-programmable quad LVDS clock generator; 0.9 ps RMS jitter; no I²C interface or spread spectrum	Used in cost-sensitive, stable-frequency applications where reconfiguration is unnecessary (e.g., legacy telecom line cards)	Choose only if frequency plan is static and I²C programming is not required; lacks flexibility and PCIe SRNS compliance

Compared with SI5338L-B05947-GMR, the Si5332A offers superior jitter and deterministic features but increases complexity and cost, while the ICS8430I-01T sacrifices programmability and compliance for simplicity and lower unit price-making SI5338L-B05947-GMR the optimal balance of flexibility, performance, and industrial qualification.

Availability

SI5338L-B05947-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 server platforms, 10 GbE switching infrastructure, and FPGA-based broadcast video equipment requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338L-B05947-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog semiconductors, specializing in RF, timing, and connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 product line delivers highly configurable, low-jitter clock generation for high-speed serial interfaces-including PCIe, Ethernet, Fibre Channel, and broadcast video-enabling system architects to consolidate timing functions and simplify board design.

FAQ

What is the primary function of the SI5338L-B05947-GMR in a PCIe Gen 4 system?

The SI5338L-B05947-GMR serves as a quad-output clock generator that delivers compliant 100 MHz reference clocks to PCIe Gen 4 root complexes and endpoints. Its 0.15–0.45 ps RMS jitter meets PCIe Gen 4 common clock specifications, and its spread-spectrum capability helps reduce electromagnetic interference without violating jitter limits. SI5338L-B05947-GMR enables consolidation of multiple oscillators into a single, programmable device.

Does the SI5338L-B05947-GMR support both differential and single-ended output formats simultaneously?

Yes, the SI5338L-B05947-GMR supports mixed-mode outputs: it can drive up to four differential pairs (e.g., LVDS) and up to eight single-ended signals (e.g., CMOS) simultaneously-or any combination thereof-using its four independent output drivers. Each driver is individually configurable for format, voltage, and termination, allowing SI5338L-B05947-GMR to interface directly with diverse logic families on the same board.

How is the SI5338L-B05947-GMR programmed, and what tools are required?

The SI5338L-B05947-GMR is programmed via its I²C/SMBus-compatible interface using Skyworks' ClockBuilder Pro software, which generates custom configuration files based on user-defined frequency plans and output settings. The device also supports hardware pin control for real-time phase/frequency adjustments. SI5338L-B05947-GMR does not require external programming hardware-standard I²C host controllers suffice for initialization and runtime updates.

What is the maximum output frequency supported by the SI5338L-B05947-GMR, and are there limitations?

The SI5338L-B05947-GMR supports output frequencies up to 710 MHz for LVPECL/LVDS/CML, 350 MHz for SSTL/HSTL, 250 MHz for HCSL, and 200 MHz for CMOS. However, only two unique frequencies above 350 MHz can be generated simultaneously-specifically Fvco/4 and Fvco/6-due to VCO architecture constraints. This limitation is explicitly defined in the datasheet and applies to SI5338L-B05947-GMR regardless of output format selection.

Is the SI5338L-B05947-GMR qualified for industrial temperature operation?

Yes, the SI5338L-B05947-GMR is fully specified and tested for operation across –40 to +85 °C ambient temperature, meeting industrial-grade reliability standards. All electrical parameters-including jitter, supply current, and phase noise-are guaranteed over this full range, and the device uses a thermally enhanced 24-QFN package with exposed pad to maintain junction temperature within safe limits under continuous load.

SI5338L-B05947-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338L-B05947-GMR FAQ

1.How can I place an order for SI5338L-B05947-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338L-B05947-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338L-B05947-GMR reliable?

The price and inventory of SI5338L-B05947-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338L-B05947-GMR is usually 5 days.

3.What payment methods are accepted for SI5338L-B05947-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338L-B05947-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338L-B05947-GMR?

SI5338L-B05947-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338L-B05947-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338L-B05947-GMR?

For technical support, including SI5338L-B05947-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338L-B05947-GMR requirements.

6.How does Aetrix verify that SI5338L-B05947-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338L-B05947-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338L-B05947-GMR meets industry standards.

7.What is the process for return or replacement of SI5338L-B05947-GMR?

All SI5338L-B05947-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338L-B05947-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338L-B05947-GMR part is unused and in its original packaging.

Return procedure for SI5338L-B05947-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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